?? config.h
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// *********************************
// LPC2000 SYSTEM WITHOUT OS
// FILE: CONFIG.H
// MODIFIED: ZPCYP 2005-3-16 20:16
// *********************************
// System configuration.
// Note: Lines containing "<...>"s are configuration items in Keil UV3. :-)
//*** <<< Use Configuration Wizard in Context Menu >>> ***
// Frequency definitions
// <o0> Oscillator Frequency (F_OSC) <1-20000000>
#define F_OSC 12000000
// Phase Locked Loop (PLL) definitions
// <e> PLL Setup
// <o1.0..4> PLL Multiplier Selection (MSEL) <1-32><#-1>
// <o1.5..6> PLL Divider Selection (PSEL) <0=> 1 <1=> 2 <2=> 4 <3=> 8
// </e>
#define PLL_SETUP 1
#define PLLCFG_VAL 0x00000023
#if PLL_SETUP > 0
#define MSEL_VAL ((PLLCFG_VAL & 0x0000001F) + 1)
#define F_CCLK (F_OSC * MSEL_VAL)
#else
#define F_CCLK (F_OSC)
#endif
// Memory Accelerator Module (MAM) definitions
// <e> MAM Setup
// <o1.0..1> MAM Control (MAMCR)
// <0=> Disabled
// <1=> Partially Enabled
// <2=> Fully Enabled
// <o2.0..2> MAM Timing (MAMTIM) <1-7>
// </e>
#define MAM_SETUP 1
#define MAMCR_VAL 0x00000002
#define MAMTIM_VAL 0x00000003
// VPB Divider definitions
// <e> VPB Divider Setup
// <o1.0..1> VPB Frequency (VPBDIV)
// <0=> 1/4 of F_cclk
// <1=> F_cclk
// <2=> 1/2 of F_cclk
// <o1.4..5> XCLK Ouput Frequency (XCLKDIV)
// <0=> 1/4 of F_cclk
// <1=> F_cclk
// <2=> 1/2 of F_cclk
// </e>
#define VPBDIV_SETUP 1
#define VPBDIV_VAL 0x00
#if VPBDIV_SETUP > 0
#if (VPBDIV_VAL & 0x03) == 2
#define F_PCLK (F_CCLK / 2)
#else
#if (VPBDIV_VAL & 0x03) == 1
#define F_PCLK (F_CCLK)
#else
#define F_PCLK (F_CCLK / 4)
#endif
#endif
#else
#define F_PCLK (F_CCLK / 4)
#endif
// Memory Remap (MEMMAP) definitions
// <e> MEMMAP Setup
// <o1.0..1> MEMMAP Control (MAP)
// <2=> Map to Internal RAM
// <3=> Map to External Memory
// </e>
#define MEMMAP_SETUP 1
#define MEMMAP_VAL 0x02
// External Memory Controller (EMC) definitions
// <e> EMC Setup
#define EMC_SETUP 1
// <e> Bank Configuration 0 (BCFG0)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit <2=> 32-bit
// </e>
#define BCFG0_SETUP 1
#define BCFG0_VAL 0x0000FDEF
// <e> Bank Configuration 1 (BCFG1)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit <2=> 32-bit
// </e>
#define BCFG1_SETUP 1
#define BCFG1_VAL 0x00002CA5
// <e> Bank Configuration 2 (BCFG2)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit <2=> 32-bit
// </e>
#define BCFG2_SETUP 1
#define BCFG2_VAL 0x14001442
// <e> Bank Configuration 3 (BCFG3)
// <o1.0..3> IDCY: Idle Cycles <0-15>
// <o1.5..9> WST1: Wait States 1 <0-31>
// <o1.11..15> WST2: Wait States 2 <0-31>
// <o1.10> RBLE: Read Byte Lane Enable
// <o1.26> WP: Write Protect
// <o1.27> BM: Burst ROM
// <o1.28..29> MW: Memory Width <0=> 8-bit <1=> 16-bit <2=> 32-bit
// </e>
#define BCFG3_SETUP 1
#define BCFG3_VAL 0x0000FBEF
// </e> End of EMC
// Pin Connect Block (PINSEL) definitions
// <e> PINSEL Setup
#define PINSEL_SETUP 1
// <e> Pin Function Select 0 (PINSEL0)
// <o1.0..1> P0.0: <0=> GPIO <1=> TXD0 <2=> PWM1
// <o1.2..3> P0.1: <0=> GPIO <1=> RXD0 <2=> PWM3 <3=> EINT0
// <o1.4..5> P0.2: <0=> GPIO <1=> SCL <2=> CAP0.0
// <o1.6..7> P0.3: <0=> GPIO <1=> SDA <2=> MAT0.0 <3=> EINT1
// <o1.8..9> P0.4: <0=> GPIO <1=> SCK0 <2=> CAP0.1
// <o1.10..11> P0.5: <0=> GPIO <1=> MISO0 <2=> MAT0.1
// <o1.12..13> P0.6: <0=> GPIO <1=> MOSI0 <2=> CAP0.2
// <o1.14..15> P0.7: <0=> GPIO <1=> SSEL0 <2=> PWM2 <3=> EINT 2
// <o1.16..17> P0.8: <0=> GPIO <1=> TXD1 <2=> PWM4
// <o1.18..19> P0.9: <0=> GPIO <1=> RXD1 <2=> PWM6 <3=> EINT 3
// <o1.20..21> P0.10: <0=> GPIO <1=> RTS1 <2=> CAP1.0
// <o1.22..23> P0.11: <0=> GPIO <1=> CTS1 <2=> CAP1.1
// <o1.24..25> P0.12: <0=> GPIO <1=> CSR1 <2=> MAT1.0
// <o1.26..27> P0.13: <0=> GPIO <1=> DTR1 <2=> MAT1.1
// <o1.28..29> P0.14: <0=> GPIO <1=> CD1 <2=> EINT1
// <o1.30..31> P0.15: <0=> GPIO <1=> RI1 <2=> EINT2
// </e>
#define PINSEL0_SETUP 1
#define PINSEL0_VAL 0x00000005
// <e> Pin Function Select 1 (PINSEL1)
// <o1.0..1> P0.16: <0=> GPIO <1=> EINT0 <2=> MAT0.2
// <o1.2..3> P0.17: <0=> GPIO <1=> CAP1.2 <2=> SCK1 <3=> MAT1.2
// <o1.4..5> P0.18: <0=> GPIO <1=> CAP1.3 <2=> MISO1 <3=> MAT1.3
// <o1.6..7> P0.19: <0=> GPIO <1=> MAT1.2 <2=> MOSI1 <3=> CAP1.2
// <o1.8..9> P0.20: <0=> GPIO <1=> MAT1.3 <2=> SSEL1 <3=> EINT3
// <o1.10..11> P0.21: <0=> GPIO <1=> PWM5 <3=> CAP1.3
// <o1.12..13> P0.22: <0=> GPIO <2=> CAP0.0 <3=> MAT0.0
// <o1.22..23> P0.27: <0=> GPIO <1=> AIN0 <2=> CAP0.1 <3=> MAT0.1
// <o1.24..25> P0.28: <0=> GPIO <1=> AIN1 <2=> CAP0.2 <3=> MAT0.2
// <o1.26..27> P0.29: <0=> GPIO <1=> AIN2 <2=> CAP0.3 <3=> MAT0.3
// <o1.28..29> P0.30: <0=> GPIO <1=> AIN3 <2=> EINT3 <3=> CAP0.0
// </e>
#define PINSEL1_SETUP 0
#define PINSEL1_VAL 0x00000000
// <e> Pin Function Select 2 (PINSEL2)
// <o1.2> P1.26-P1.36: <0=> GPIO <1=> JTAG
// <o1.3> P1.16-P1.25: <0=> GPIO <1=> TRACE
// <o1.4..5> BUS Select: <0=> 8-Bit <1=> 16-Bit <2=> 32-Bit <3=> No Bus
// <o1.6> P3.29(Bus not 32-bit): <0=> GPIO <1=> AIN6
// <o1.7> P3.28(Bus not 32-bit): <0=> GPIO <1=> AIN7
// <o1.8> P3.27: <0=> GPIO <1=> WE
// <o1.11> P3.26: <0=> GPIO <1=> CS1
// <o1.13> P3.23(PINSEL2.25:23!=111): <0=> GPIO <1=> XCLK Output
// <o1.14..15> P3.25: <0=> GPIO <1=> CS2
// <o1.16..17> P3.24: <0=> GPIO <1=> CS3
// <o1.21> P2.30: <0=> GPIO <1=> AIN4
// <o1.22> P2.31: <0=> GPIO <1=> AIN5
// <o1.23> P3.0: <0=> GPIO <1=> A0
// <o1.24> P3.1: <0=> GPIO <1=> A1
// <o1.25..27> P3.2-P3.23:
// <0=> Disable A23:2
// <1=> Enable A3:2
// <2=> Enable A5:2
// <3=> Enable A7:2
// <4=> Enable A11:2
// <5=> Enable A15:2
// <6=> Enable A19:2
// <7=> Enable A23:2
// </e>
#define PINSEL2_SETUP 1
#define PINSEL2_VAL 0x0F814914
// </e> End of PINSEL
// UART definitions
// <e> UART0 Setup
// <o1> Baud rate <1-115200>
// </e>
#define UART0_SETUP 1
#define UART0_BAUD 9600
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