?? os_cpu_a.lst
字號(hào):
187 00000058 ; RESTORE NEW TASK'S CONTEXT
188 00000058 E8BD0010 LDMFD SP!, {R4} ; Pop new task's
CPSR
189 0000005C E16FF004 MSR SPSR_cxsf, R4
190 00000060
191 00000060 E8FDDFFF LDMFD SP!, {R0-R12,LR,PC}^ ; Pop n
ew task's context
192 00000064
193 00000064
194 00000064 ;*******************************************************
**************************************************
195 00000064 ; PERFORM A CONTEXT SWITCH (From inter
rupt level) - OSIntCtxSw()
196 00000064 ;
197 00000064 ; Note(s) : 1) OSIntCtxSw() is called in SYS mode with B
OTH FIQ and IRQ interrupts DISABLED
198 00000064 ;
199 00000064 ; 2) The pseudo-code for OSCtxSw() is:
200 00000064 ; a) OSTaskSwHook();
201 00000064 ; b) OSPrioCur = OSPrioHighRdy;
202 00000064 ; c) OSTCBCur = OSTCBHighRdy;
203 00000064 ; d) SP = OSTCBHighRdy->
OSTCBStkPtr;
204 00000064 ; e) Restore the new task's context from th
e new task's stack
205 00000064 ; f) Return to new task's code
206 00000064 ;
207 00000064 ; 3) Upon entry:
208 00000064 ; OSTCBCur points to the OS_TCB of the
209 00000064 ; OSTCBHighRdy points to the OS_TCB of the
ARM Macro Assembler Page 6
task to resume
210 00000064 ;*******************************************************
**************************************************
211 00000064
212 00000064 AREA OSIntCtxSw_CODE32, CODE, READON
LY
213 00000000 ARM
214 00000000
215 00000000 OSIntCtxSw
216 00000000 E51F0008 LDR R0, OS_TaskSwHook
; OSTaskSwHook();
217 00000004 E1A0E00F MOV LR, PC
218 00000008 E12FFF10 BX R0
219 0000000C
220 0000000C E51F4008 LDR R4,OS_PrioCur ; OSPrioCur = OSP
rioHighRdy
221 00000010 E51F5008 LDR R5,OS_PrioHighRdy
222 00000014 E5D56000 LDRB R6,[R5]
223 00000018 E5C46000 STRB R6,[R4]
224 0000001C
225 0000001C E51F4008 LDR R4,OS_TCBCur ; OSTCBCur = OSTC
BHighRdy;
226 00000020 E51F6008 LDR R6,OS_TCBHighRdy
227 00000024 E5966000 LDR R6,[R6]
228 00000028 E5846000 STR R6,[R4]
229 0000002C
230 0000002C E596D000 LDR SP,[R6] ; SP = OSTCBHighRdy
->OSTCBStkPtr;
231 00000030
232 00000030 ; RESTORE NEW TASK'S CONTEXT
233 00000030 E8BD0010 LDMFD SP!, {R4} ; Pop new task's
CPSR
234 00000034 E16FF004 MSR SPSR_cxsf, R4
235 00000038
236 00000038 E8FDDFFF LDMFD SP!, {R0-R12,LR,PC}^ ; Pop n
ew task's context
237 0000003C
238 0000003C
239 0000003C ;*******************************************************
**************************************************
240 0000003C ; IRQ Interrupt Ser
vice Routine
241 0000003C ;*******************************************************
**************************************************
242 0000003C
243 0000003C AREA OS_CPU_IRQ_ISR_CODE32, CODE, RE
ADONLY
244 00000000 ARM
245 00000000
246 00000000 OS_CPU_IRQ_ISR
247 00000000
248 00000000 E92D000E STMFD SP!, {R1-R3} ; PUSH WORKING REG
ISTERS ONTO IRQ STA
CK
249 00000004
250 00000004 E1A0100D MOV R1, SP ; Save IRQ stack
pointer
251 00000008
252 00000008 E28DD00C ADD SP, SP,#12 ; Adjust IRQ stack
ARM Macro Assembler Page 7
pointer
253 0000000C
254 0000000C E24E2004 SUB R2, LR,#4 ; Adjust PC for ret
urn address to task
255 00000010
256 00000010 E14F3000 MRS R3, SPSR ; Copy SPSR (i.e. i
nterrupted task's C
PSR) to R3
257 00000014
258 00000014 E321F0D3 MSR CPSR_c, #(NO_INT | SVC32_MODE)
; Change to SVC mod
e
259 00000018
260 00000018 ; SAVE TASK'S CONTEXT ONTO TASK'S STACK
261 00000018 E92D0004 STMFD SP!, {R2} ; Push task's Re
turn PC
262 0000001C E92D4000 STMFD SP!, {LR} ; Push task's LR
263 00000020 E92D1FF0 STMFD SP!, {R4-R12} ; Push task's
R12-R4
264 00000024
265 00000024 E8B10070 LDMFD R1!, {R4-R6} ; Move task's R
1-R3 from IRQ stack
to SVC stack
266 00000028 E92D0070 STMFD SP!, {R4-R6}
267 0000002C E92D0001 STMFD SP!, {R0} ; Push task's R0
onto task's sta
ck
268 00000030 E92D0008 STMFD SP!, {R3} ; Push task's CP
SR (i.e. IRQ's SPSR
)
269 00000034
270 00000034 ; HANDLE NESTING COUNTER
271 00000034 E59F0054 LDR R0, OS_IntNesting
; OSIntNesting++;
272 00000038 E5D01000 LDRB R1, [R0]
273 0000003C E2811001 ADD R1, R1,#1
274 00000040 E5C01000 STRB R1, [R0]
275 00000044
276 00000044 E3510001 CMP R1, #1 ; if (OSIntNesting
== 1) {
277 00000048 1A000002 BNE OS_CPU_IRQ_ISR_1
278 0000004C
279 0000004C E59F404C LDR R4, OS_TCBCur ; OSTCBCur->O
STCBStkPtr = SP
280 00000050 E5945000 LDR R5, [R4]
281 00000054 E585D000 STR SP, [R5] ; }
282 00000058
283 00000058 OS_CPU_IRQ_ISR_1
284 00000058 E321F0D2 MSR CPSR_c, #(NO_INT | IRQ32_MODE)
; Change to IRQ mod
e (to use the IRQ s
tack to handle inte
rrupt)
285 0000005C
286 0000005C E59F0024 LDR R0, OS_CPU_IRQ_ISR_Handler ; OS
_CPU_IRQ_ISR_Handle
r();
ARM Macro Assembler Page 8
287 00000060 E1A0E00F MOV LR, PC
288 00000064 E12FFF10 BX R0
289 00000068
290 00000068 E321F0D3 MSR CPSR_c, #(NO_INT | SVC32_MODE)
; Change to SVC mod
e
291 0000006C
292 0000006C E59F0018 LDR R0, OS_IntExit ; OSIntExit();
293 00000070 E1A0E00F MOV LR, PC
294 00000074 E12FFF10 BX R0
295 00000078
296 00000078 ; RESTORE NEW TASK'S CONTEXT
297 00000078 E8BD0010 LDMFD SP!, {R4} ; Pop new task's
CPSR
298 0000007C E16FF004 MSR SPSR_cxsf, R4
299 00000080
300 00000080 E8FDDFFF LDMFD SP!, {R0-R12,LR,PC}^ ; Pop n
ew task's context
301 00000084
302 00000084
303 00000084
304 00000084 ;*******************************************************
**************************************************
305 00000084 ; POINTERS TO VARIAB
LES
306 00000084 ;*******************************************************
**************************************************
307 00000084
308 00000084
309 00000084 OS_TaskSwHook
310 00000084 00000000 DCD OSTaskSwHook
311 00000088
312 00000088 OS_CPU_IRQ_ISR_Handler
313 00000088 00000000 DCD Timer0_Exception
314 0000008C
315 0000008C
316 0000008C OS_IntExit
317 0000008C 00000000 DCD OSIntExit
318 00000090
319 00000090 OS_IntNesting
320 00000090 00000000 DCD OSIntNesting
321 00000094
322 00000094 OS_PrioCur
323 00000094 00000000 DCD OSPrioCur
324 00000098
325 00000098 OS_PrioHighRdy
326 00000098 00000000 DCD OSPrioHighRdy
327 0000009C
328 0000009C OS_Running
329 0000009C 00000000 DCD OSRunning
330 000000A0
331 000000A0 OS_TCBCur
332 000000A0 00000000 DCD OSTCBCur
333 000000A4
334 000000A4 OS_TCBHighRdy
335 000000A4 00000000 DCD OSTCBHighRdy
336 000000A8
337 000000A8 END
Command Line: --debug --xref --device=DARMP --apcs=interwork -oos_cpu_a.o -IC:\
ARM Macro Assembler Page 9
Keil\ARM\INC\Philips --list=.\os_cpu_a.lst Port\os_cpu_a.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
OS_CPU_SR_CODE32 00000000
Symbol: OS_CPU_SR_CODE32
Definitions
At line 80 in file Port\os_cpu_a.s
Uses
None
Comment: OS_CPU_SR_CODE32 unused
OS_CPU_SR_Restore 00000020
Symbol: OS_CPU_SR_Restore
Definitions
At line 94 in file Port\os_cpu_a.s
Uses
At line 31 in file Port\os_cpu_a.s
Comment: OS_CPU_SR_Restore used once
OS_CPU_SR_Save 00000000
Symbol: OS_CPU_SR_Save
Definitions
At line 83 in file Port\os_cpu_a.s
Uses
At line 30 in file Port\os_cpu_a.s
At line 90 in file Port\os_cpu_a.s
3 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
OSStartHighRdy 00000000
Symbol: OSStartHighRdy
Definitions
At line 112 in file Port\os_cpu_a.s
Uses
At line 32 in file Port\os_cpu_a.s
Comment: OSStartHighRdy used once
OSStartHighRdy_CODE32 00000000
Symbol: OSStartHighRdy_CODE32
Definitions
At line 109 in file Port\os_cpu_a.s
Uses
None
Comment: OSStartHighRdy_CODE32 unused
2 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
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