?? sen_main.c
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#include <iom32v.h>
#include <macros.h>
#include "api.h"
//#include "function.h"
//-----------------------------------------------------//
#ifndef TX_ADR_WIDTH
#define TX_ADR_WIDTH 5
#endif
#ifndef TX_PLOAD_WIDTH
#define TX_PLOAD_WIDTH 2
#endif
uchar TX_ADDRESS[TX_ADR_WIDTH] = {0x49,0x49,0x49,0x49,0};
uchar COMMON_ADDRESS[TX_ADR_WIDTH] = {0x85,0x85,0x85,0x85,0x85};
uchar rx_buf[TX_PLOAD_WIDTH];
uchar tx_buf[TX_PLOAD_WIDTH];
uchar add[3][TX_PLOAD_WIDTH];
uchar test[TX_PLOAD_WIDTH];
uchar COMMAND[TX_PLOAD_WIDTH+6];
uchar flag,point;
uchar TOTAL_NUMBER=1;
//------------------------------------------------------//
//------------------------------------------------------------//
//----------------------------------------------------
void set_CE(uchar state)
{
if (state==0) PORTB &= ~BIT(PORTB3);//set CE to Low
else PORTB |= BIT(PORTB3); //set CE to high
}
void set_CSN(uchar state)
{
if (state==0) PORTB &= ~BIT(PORTB4);//set CSN to Low
else PORTB |= BIT(PORTB4); //set CSN to high
}
void set_LED(uchar state)
{
if (state==0) PORTC &= ~BIT(PORTB0);//set LED to douse
else PORTC |= BIT(PORTB0); //set LED to bright
}
//-----------------------------------------------------
void delay_ms(unsigned int x)
{
unsigned int i,j,k;
i=0;
for(i=0;i<x;i++)
{
j=0xff;
while(j--){
k=0x10;
while(k--){}
};
}
}
//----------------------------------------------------
/**************************************************
Function: SPI_RW();
Description:
Writes one byte to nRF24L01, and return the byte read
from nRF24L01 during write, according to SPI protocol
/**************************************************/
uchar SPI_RW(uchar CONTENT)
{
//set_CSN(0);
SPDR = CONTENT; //Write_register 001x xxxx (xxxxx register address)
while (!(SPSR&(1<<SPIF))) {}
//set_CSN(1);
return SPDR;// return read byte
}
/**************************************************/
/**************************************************
Function: SPI_RW_Reg();
Description:
Writes value 'value' to register 'reg'
/**************************************************/
uchar SPI_RW_Reg(uchar reg, uchar value)
{
uchar status;
set_CSN(0); // CSN low, init SPI transaction
status = SPI_RW(reg); // select register
SPI_RW(value); // ..and write value to it..
set_CSN(1); // CSN high again
return(status); // return nRF24L01 status byte
}
/**************************************************/
/**************************************************
Function: SPI_Read();
Description:
Read one byte from nRF24L01 register, 'reg'
/**************************************************/
uchar SPI_Read(uchar reg)
{
uchar reg_val;
set_CSN(0); // CSN low, initialize SPI communication...
SPI_RW(reg); // Select register to read from..
reg_val = SPI_RW(0); // ..then read registervalue
set_CSN(1); // CSN high, terminate SPI communication
return(reg_val); // return register value
}
/**************************************************/
/**************************************************
Function: SPI_Read_Buf();
Description:
Reads 'bytes' #of bytes from register 'reg'
Typically used to read RX payload, Rx/Tx address
/**************************************************/
uchar SPI_Read_Buf(uchar reg, uchar *pBuf, uchar bytes)
{
uchar status,byte_ctr;
set_CSN(0); // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
pBuf[byte_ctr] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01
set_CSN(1); // Set CSN high again
return(status); // return nRF24L01 status byte
}
/**************************************************/
/**************************************************
Function: SPI_Write_Buf();
Description:
Writes contents of buffer '*pBuf' to nRF24L01
Typically used to write TX payload, Rx/Tx address
/**************************************************/
uchar SPI_Write_Buf(uchar reg, uchar *pBuf, uchar bytes)
{
uchar status,byte_ctr;
set_CSN(0); // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status byte
for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
SPI_RW(*pBuf++);
set_CSN(1); // Set CSN high again
return(status); // return nRF24L01 status byte
}
/**************************************************/
//------------------------------------------------------------//
void show_status()
{
test[0] = SPI_Read( EN_AA);
test[1] = SPI_Read( EN_RXADDR);
test[2] = SPI_Read( SETUP_AW);
test[3] = SPI_Read( SETUP_RETR);
test[4] = SPI_Read( RF_CH);
test[5] = SPI_Read( RF_SETUP);
test[6] = SPI_Read( RX_ADDR_P2);
test[7] = SPI_Read( RX_ADDR_P3);
test[8] = SPI_Read( RX_ADDR_P4);
test[9] = SPI_Read( RX_ADDR_P5);
test[10] = SPI_Read( RX_PW_P0);
test[11] = SPI_Read( STATUS);
SPI_Read_Buf(RX_ADDR_P0, &add[0][0], 5);
SPI_Read_Buf(RX_ADDR_P1, &add[1][0], 5);
SPI_Read_Buf(TX_ADDR, &add[2][0], 5);
}
/**************************************************
Function: RX_Mode();
Description:
This function initializes one nRF24L01 device to
RX Mode, set RX address, writes RX payload width,
select RF channel, datarate & LNA HCURR.
After init, CE is toggled high, which means that
this device is now ready to receive a datapacket.
/**************************************************/
void RX_Mode(void)
{
set_CE(0);
SPI_RW_Reg(WRITE_REG+STATUS,0x70);
SPI_RW_Reg(FLUSH_RX,0);
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device
SPI_Write_Buf(WRITE_REG + RX_ADDR_P1, COMMON_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device
show_status();
set_CE(1); // Set CE pin high to enable RX device
// This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
// PIPE0 '4949494949', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
//PIPE1 '8585858585', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
}
/**************************************************/
/**************************************************
Function: TX_Mode();
Description:
This function initializes one nRF24L01 device to
TX mode, set TX address, set RX address for auto.ack,
fill TX payload, select RF channel, datarate & TX pwr.
PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
ToDo: One high pulse(>10us) on CE will now send this
packet and expext an acknowledgment from the RX device.
/**************************************************/
void TX_Mode()
{
set_CE(0);
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
SPI_RW_Reg(WRITE_REG+STATUS,0x70); //clear all interupt flags.
SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // Writes TX_Address to pipe0 of nRF24L01
SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH); // Writes data to TX payload
show_status();
set_CE(1);
}
/**************************************************/
/**************************************************
Function: check_ACK();
Description:
check if have "Data sent TX FIFO interrupt",if TX_DS=1,
all led light and after delay 100ms all led close
/**************************************************
void check_ACK()
{
uchar test;
test=SPI_Read(READ_REG+STATUS); // read register STATUS's
test=test&0x20; // check if have Data sent TX FIFO interrupt (TX_DS=1)
if(test==0x20) // TX_DS =1
{
P0=0x00; // turn on all led
delay100(); // delay 100ms
P0=0xff;
}
}
/**************************************************/
/**************************************************
Function: Sending();
Description:
write data to UDR
/**************************************************/
/**void Sending (uchar data)
{
while ( !( UCSRA & (1<<UDRE)) );
UDR = data;
}**/
/**************************************************/
//------------------------------------------------------------//
//------------------------------------------------------------//
/* The Start of the Program
The first part is the initiation
*/
//------------------------------------------------------//
//---------------------------------------
void port_init(void)
{
PORTA = 0x00;
DDRA = 0x00;
PORTB = 0x00;
DDRB = 0xB8;
PORTC = 0x00; //m103 output only
DDRC = 0x01;
PORTD = 0x00;
DDRD = 0x02;
}
//SPI initialize
// clock rate: 1000000hz
void spi_init(void)
{
SPCR = 0x50; //setup SPI
SPSR = 0x00; //setup SPI
}
initial_24L01()
{
set_CE(0);
SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
//SPI_RW_Reg(WRITE_REG + EN_AA, 0x00); // DIsable Auto.Ack:Pipe0
SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
SPI_Write_Buf(WRITE_REG + RX_ADDR_P1, COMMON_ADDRESS, TX_ADR_WIDTH); // RX_Addr1 same as TX_Adr for Auto.Ack
set_CE(1);
}
//--------------------------------------------------//
//UART0 initialize
// desired baud rate: 9600
// actual: baud rate:9615 (0.2%)
// char size: 8 bit
// parity: Disabled
void uart0_init(void)
{
UCSRB = 0x00; //disable while setting baud rate
UCSRA = 0x00;
UCSRC = BIT(URSEL) | 0x06;
UBRRL = 0x19; //set baud rate lo
UBRRH = 0x00; //set baud rate hi
UCSRB = 0x90;
}
//-------------------------------------------------//
void device_init(void)
{
CLI(); //disable all interrupts
port_init();
spi_init();
uart0_init();
point=0;
MCUCR = 0x00;
GICR = 0x40;
TIMSK = 0x00; //timer interrupt sources
initial_24L01();
set_LED(1);
delay_ms(50);
set_LED(0);
SEI(); //re-enable interrupts
}
#pragma interrupt_handler uart0_rx_isr:14
void uart0_rx_isr(void)
{
CLI();
COMMAND[point]=UDR;
point++;
SEI();
//uart has received a character in UDR
}
//------------------------------------------------------------//
/* FUNCTION:Interuption
DESCRIPTION:
(1)the int0 is acclaimed to the active low of IRQ
(2)the uart0 is acclaimed to the input from the computer
//------------------------------------------------------------------------*/
#pragma interrupt_handler int0_isr:2
void int0_isr(void)
{
uchar sta;
CLI();
sta=SPI_Read(STATUS); // read register STATUS's value
sta&=0x70;
if(sta>=0x40) // if receive data ready (RX_DR) interrupt
{
SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
}
flag=sta;
SPI_RW_Reg(WRITE_REG+STATUS,sta);// clear RX_DR or TX_DS or MAX_RT interrupt flag
set_CE(0);
SEI();
}
//------------------------------------------------------------//
/*********************************************
//MAIN PART 1 (Sending Mode)
void main(void)
{
uchar xx=0;
unsigned int i;
device_init();
while(1)
{
//TxData(xx); // send data to uart
flag=0;
for (i=0;i<TX_PLOAD_WIDTH;i++)tx_buf[i]=xx;
TX_Mode(); // set TX Mode and transmitting
NOP();
//-------------------------------------//
while (flag==0){}
if(flag==0x20) // finish receiving
{
if (xx==0) xx=0xff;
else xx=0;
set_LED(xx);
delay_ms(0xff);
}
}
}
****************************************/
void Sending_type1()
{
unsigned int i;
flag=0;
while(flag==0x00)
{
flag=0;set_CE(0);
for (i=0;i<TX_PLOAD_WIDTH;i++)tx_buf[i]=COMMAND[5+i];
TX_Mode(); // set TX Mode and transmitting
NOP();
//-------------------------------------//
while (flag==0){}
set_LED(COMMAND[5]);
delay_ms(0x0f);
}
}
void Sending_type0()
{
unsigned int i;
unsigned int j;
for (i=0;i<TOTAL_NUMBER;i++)
{
TX_ADDRESS[TX_ADR_WIDTH-1]=i;
Sending_type1();
}
TX_ADDRESS[TX_ADR_WIDTH-1]=0;
}
void Sending()
{
unsigned int i;
unsigned int j;
flag=0;
//TxData(xx); // send data to uart
flag=0; set_CE(0); j=0 ;
for (i=0;i<TX_ADR_WIDTH;i++)
{
if (COMMAND[i]!=COMMON_ADDRESS[i])j++;
}
if (j>0)
for (i=0;i<TX_ADR_WIDTH;i++)
{
TX_ADDRESS[i]=COMMAND[i]; Sending_type1();
}
else Sending_type0();
TX_ADDRESS[TX_ADR_WIDTH-1]=0;
}
//------------------------------------------------------------//
//MAIN PART 1 (Sending Mode)
void main()
{
unsigned int xx=0;
unsigned int i;
device_init();
while(1)
{
if (point==TX_PLOAD_WIDTH+6)
{
if (COMMAND[point-1]==0xaa)Sending();
point=0;xx=0;
}
else NOP();
xx++;
if (xx==0xffff ){xx=0;point=0;}
}
}
//END OF MAIN PART1*/
//------------------------------------------------------------//
//------------------------------------------------------------//
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