// Asynchronous serial interface operation mode register (ASIM0, ASIM6)
#define Uart0_Asim0_Reset_Value  		0x01    // only for ASIM0 in UART0
#define Uart_Power_On  				0x80
#define Uart_Power_Off  			0x00			
#define Uart_Not_Parity 			0x00
#define Uart_Zero_Parity 			0x08
#define Uart_Odd_Parity 			0x10
#define Uart_Even_Parity 			0x18
#define Uart_Data_Bit_8	 			0x04
#define Uart_Data_Bit_7	 			0x00
#define Uart_Stop_Bit_2 			0x02
#define Uart_Stop_Bit_1 			0x00
#define Uart6_Reception_Error_Interrupt_is_INTSRE6 		0x00  // only for ASIM6 in UART6
#define Uart6_Reception_Error_Interrupt_is_INTSR6 		0x01  // only for ASIM6 in UART6

#define Uart0_Transmit_Enable() 		TXE0 = 1
#define Uart0_Transmit_Disable() 		TXE0 = 0	
#define Uart0_Receive_Enable()			RXE0 = 1
#define Uart0_Receive_Disable() 		RXE0 = 0

#define Uart6_Transmit_Enable() 		TXE6 = 1
#define Uart6_Transmit_Disable() 		TXE6 = 0	
#define Uart6_Receive_Enable()			RXE6 = 1
#define Uart6_Receive_Disable() 		RXE6 = 0


//Asynchronous serial interface reception error status register (ASIS0, ASIS6)
#define Uart_Parity_Error  		0x04  //the parity of transmit data doesn't match the parity bit on completion of reception
 
#define Uart_Framing_Error  		0x02  //the stop bit is not detected on completion of reception

#define Uart_Overrun_Error  		0x01  //If receive data is set to the RXB6 register and the next reception operation
                                      		//is completed before the data is read
                                      

//Format of Asynchronous Serial Interface Transmission Status Register 6 (ASIF6), only for UART6
#define Uart6_Transmit_Buffer_Flag  	0x02  //If data is written to transmit buffer register 6 (TXB6) 
                                              //(if data exists in TXB6)
#define Uart6_Transmit_Shift_Flag  	0x01  //If data is transferred from transmit buffer register 6 (TXB6) 
                                              //(if data transmission is in progress)
                                      

// Format of Baud Rate Generator Control Register 0 (BRGC0). only for UART0. Detailsp Pls refer to page333 in manual 
#define Uart0_BaseClk_1			0x00       // fxclk0 = TM50 output
#define Uart0_BaseClk_2			0x40       // fxclk0 = fprs/2
#define Uart0_BaseClk_3			0x80       // fxclk0 = fprs/8
#define Uart0_BaseClk_4			0xc0       // fxclk0 = fprs/32




//Format of Asynchronous Serial Interface Control Register 6 (ASICL6).only for UART6
#define Uart6_First_LSB  		0x02
#define Uart6_First_MSB  		0x00
#define Uart6_TxD6_Output_Inverted  	0x01
#define Uart6_TxD6_Output_Normal  	0x00


//Format of Port Mode Register 1 (PM1) (UART0, UART6)
#define Uart_TxD_Output_Mode		0      // PM10, PM13
#define Uart_TxD_Output_Init		1      // initialization to output high level
#define Uart_RxD_Iutput_Mode		1      // PM11, PM14