{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "6.641 ns register register " "Info: Estimated most critical path is register to register delay of 6.641 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clock3000000:inst3\|count\[6\] 1 REG LAB_X15_Y5 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y5; Fanout = 4; REG Node = 'clock3000000:inst3\|count\[6\]'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "" { clock3000000:inst3|count[6] } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.178 ns) + CELL(0.575 ns) 1.753 ns clock3000000:inst3\|Add0~402COUT1 2 COMB LAB_X15_Y7 2 " "Info: 2: + IC(1.178 ns) + CELL(0.575 ns) = 1.753 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'clock3000000:inst3\|Add0~402COUT1'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "1.753 ns" { clock3000000:inst3|count[6] clock3000000:inst3|Add0~402COUT1 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.833 ns clock3000000:inst3\|Add0~398COUT1 3 COMB LAB_X15_Y7 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.833 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'clock3000000:inst3\|Add0~398COUT1'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { clock3000000:inst3|Add0~402COUT1 clock3000000:inst3|Add0~398COUT1 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.913 ns clock3000000:inst3\|Add0~396COUT1 4 COMB LAB_X15_Y7 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.913 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'clock3000000:inst3\|Add0~396COUT1'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { clock3000000:inst3|Add0~398COUT1 clock3000000:inst3|Add0~396COUT1 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.993 ns clock3000000:inst3\|Add0~394COUT1 5 COMB LAB_X15_Y7 2 " "Info: 5: + IC(0.000 ns) + CELL(0.080 ns) = 1.993 ns; Loc. = LAB_X15_Y7; Fanout = 2; COMB Node = 'clock3000000:inst3\|Add0~394COUT1'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { clock3000000:inst3|Add0~396COUT1 clock3000000:inst3|Add0~394COUT1 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 2.251 ns clock3000000:inst3\|Add0~388 6 COMB LAB_X15_Y7 6 " "Info: 6: + IC(0.000 ns) + CELL(0.258 ns) = 2.251 ns; Loc. = LAB_X15_Y7; Fanout = 6; COMB Node = 'clock3000000:inst3\|Add0~388'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.258 ns" { clock3000000:inst3|Add0~394COUT1 clock3000000:inst3|Add0~388 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 2.387 ns clock3000000:inst3\|Add0~406 7 COMB LAB_X15_Y7 6 " "Info: 7: + IC(0.000 ns) + CELL(0.136 ns) = 2.387 ns; Loc. = LAB_X15_Y7; Fanout = 6; COMB Node = 'clock3000000:inst3\|Add0~406'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { clock3000000:inst3|Add0~388 clock3000000:inst3|Add0~406 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 3.066 ns clock3000000:inst3\|Add0~379 8 COMB LAB_X15_Y6 3 " "Info: 8: + IC(0.000 ns) + CELL(0.679 ns) = 3.066 ns; Loc. = LAB_X15_Y6; Fanout = 3; COMB Node = 'clock3000000:inst3\|Add0~379'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.679 ns" { clock3000000:inst3|Add0~406 clock3000000:inst3|Add0~379 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.257 ns) + CELL(0.114 ns) 4.437 ns clock3000000:inst3\|LessThan2~477 9 COMB LAB_X16_Y8 1 " "Info: 9: + IC(1.257 ns) + CELL(0.114 ns) = 4.437 ns; Loc. = LAB_X16_Y8; Fanout = 1; COMB Node = 'clock3000000:inst3\|LessThan2~477'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "1.371 ns" { clock3000000:inst3|Add0~379 clock3000000:inst3|LessThan2~477 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.774 ns) + CELL(0.590 ns) 5.801 ns clock3000000:inst3\|LessThan2~480 10 COMB LAB_X15_Y6 1 " "Info: 10: + IC(0.774 ns) + CELL(0.590 ns) = 5.801 ns; Loc. = LAB_X15_Y6; Fanout = 1; COMB Node = 'clock3000000:inst3\|LessThan2~480'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "1.364 ns" { clock3000000:inst3|LessThan2~477 clock3000000:inst3|LessThan2~480 } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.362 ns) + CELL(0.478 ns) 6.641 ns clock3000000:inst3\|clkout 11 REG LAB_X15_Y6 56 " "Info: 11: + IC(0.362 ns) + CELL(0.478 ns) = 6.641 ns; Loc. = LAB_X15_Y6; Fanout = 56; REG Node = 'clock3000000:inst3\|clkout'" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "0.840 ns" { clock3000000:inst3|LessThan2~480 clock3000000:inst3|clkout } "NODE_NAME" } } { "clock3000000.vhd" "" { Text "D:/Documents and Settings/yyy/桌面/yue/clock3000000.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.070 ns ( 46.23 % ) " "Info: Total cell delay = 3.070 ns ( 46.23 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.571 ns ( 53.77 % ) " "Info: Total interconnect delay = 3.571 ns ( 53.77 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "6.641 ns" { clock3000000:inst3|count[6] clock3000000:inst3|Add0~402COUT1 clock3000000:inst3|Add0~398COUT1 clock3000000:inst3|Add0~396COUT1 clock3000000:inst3|Add0~394COUT1 clock3000000:inst3|Add0~388 clock3000000:inst3|Add0~406 clock3000000:inst3|Add0~379 clock3000000:inst3|LessThan2~477 clock3000000:inst3|LessThan2~480 clock3000000:inst3|clkout } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Info: Average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "3 X14_Y0 X27_Y14 " "Info: Peak interconnect usage is 3% of the available device resources in the region that extends from location X14_Y0 to location X27_Y14" {  } {  } 0 0 "Peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "" 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 0 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "" 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " "Info: Node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear sld_hub:sld_hub_inst\|jtag_debug_mode " "Info: Port clear -- assigned as a global for destination node sld_hub:sld_hub_inst\|jtag_debug_mode -- routed using non-global resources" {  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode } "NODE_NAME" } } { "c:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/quartus/libraries/megafunctions/sld_hub.vhd" 394 -1 0 } } { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|jtag_debug_mode } "NODE_NAME" } }  } 0 0 "Port %1!s! -- assigned as a global for destination node %2!s! -- routed using non-global resources" 0 0 "" 0}  } { { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } } { "c:/quartus/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/quartus/libraries/megafunctions/sld_hub.vhd" 1163 -1 0 } } { "c:/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } }  } 0 0 "Node %1!s! uses non-global routing resources to route signals to global destination nodes" 0 0 "" 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/Documents and Settings/yyy/桌面/yue/Block1.fit.smsg " "Info: Generated suppressed messages file D:/Documents and Settings/yyy/桌面/yue/Block1.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 1  Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "171 " "Info: Allocated 171 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Nov 26 13:25:53 2007 " "Info: Processing ended: Mon Nov 26 13:25:53 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}