//-----------------------------------------------------------------------------
// Copyright (c) 2005 Cypress Semiconductor, Inc. All rights reserved
//
// File:      gpif.h
// Contents:   Header file
// $Archive: /USB/atapifx2/NX2LP/SRC/CY3686FW/gpif.h $
// $Date: 8/08/05 10:49a $
// $Revision: 1 $
//-----------------------------------------------------------------------------
//
// Copyright 2005, Cypress Semiconductor Corporation.
//
// This software is owned by Cypress Semiconductor Corporation (Cypress)
// and is protected by and subject to worldwide patent protection (United
// States and foreign), United States copyright laws and international 
// treaty provisions. Cypress hereby grants to licensee a personal, 
// non-exclusive, non-transferable license to copy, use, modify, create 
// derivative works of, and compile the Cypress Source Code and derivative 
// works for the sole purpose of creating custom software in support of 
// licensee product to be used only in conjunction with a Cypress integrated 
// circuit as specified in the applicable agreement. Any reproduction, 
// modification, translation, compilation, or representation of this 
// software except as specified above is prohibited without the express 
// written permission of Cypress.
//
// Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND,EXPRESS OR IMPLIED, 
// WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
// Cypress reserves the right to make changes without further notice to the
// materials described herein. Cypress does not assume any liability arising
// out of the application or use of any product or circuit described herein.
// Cypress does not authorize its products for use as critical components in
// life-support systems where a malfunction or failure may reasonably be
// expected to result in significant injury to the user. The inclusion of
// Cypress' product in a life-support systems application implies that the
// manufacturer assumes all risk of such use and in doing so indemnifies
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// Use may be limited by and subject to the applicable Cypress software
// license agreement.
//
//--------------------------------------------------------------------------

#define IFCONFIG_DEFAULT 0xCA
                        // 11001110
                        // ||||||||_0 = IFCFG = GPIF Interface (internal master)
                        // |||||||__1 = IFCFG /
                        // ||||||___1 = output GSTATE on port E
                        // |||||____1 = ASYNC -- Control lines are clocks, not enables
                        // ||||_____0 = IFclock polarity = normal
                        // |||______0 = Disable IFclock Output enable
                        // ||_______1 = 48Mhz IFclock
                        // |________1 = Internal IFclock


#define GPIF_READY  (XBYTE[0xE400])                   // Ready1 and Ready0
    #define cReadyWait   8                            // wait for both ready1 and ready0
	#define cReadyIgnore 9                            // ignore ready

// See the GPIF wave form on the Output 
#define cGPIFBANK   0xE411
#define GPIF_BANK0  (XBYTE[0xE411])                   // Read Enable State0
#define GPIF_BANK1  (XBYTE[0xE412])                   // Read Enable State1
#define GPIF_BANK2  (XBYTE[0xE413])                   // Read Enable State1
    #define cBank3      1                             // both bank enable:  default
    #define cBank0      5                             // read enable bank0
    #define cBank1      3                             // read enable bank1

#define ready_ignore()    GPIF_READY=cReadyIgnore
#define ready_default()   GPIF_READY=cReadyWait

#define bank_default()   { GPIF_READY=cReadyWait; GPIF_BANK2=GPIF_BANK1=GPIF_BANK0=cBank3; } 
#define bank_select(b)   { GPIF_BANK2=GPIF_BANK1=GPIF_BANK0=b; }      // Read Enable select
#define fast_bank_sel(b) { P_XAUTODAT2=P_XAUTODAT2=P_XAUTODAT2=b; }   // Read Enable select

#undef _at_

#define gpifIdle() (GPIFTRIG & 0x80)

// States
#define UNCONFIGURED        0
#define WAIT_FOR_CBW        1
#define RECEIVED_OUT_CMD    1 //2
#define RECEIVED_IN_CMD     1 //3
#define RECEIVED_CBW        1 //4