?? p18c242.inc
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D EQU H'0005'
I2C_DAT EQU H'0005'
NOT_A EQU H'0005'
NOT_ADDRESS EQU H'0005'
D_A EQU H'0005'
DATA_ADDRESS EQU H'0005'
P EQU H'0004'
I2C_STOP EQU H'0004'
S EQU H'0003'
I2C_START EQU H'0003'
R EQU H'0002'
I2C_READ EQU H'0002'
NOT_W EQU H'0002'
NOT_WRITE EQU H'0002'
R_W EQU H'0002'
READ_WRITE EQU H'0002'
UA EQU H'0001'
BF EQU H'0000'
;----- SSPCON1 Bits --------------------------------------------------------
WCOL EQU H'0007'
SSPOV EQU H'0006'
SSPEN EQU H'0005'
CKP EQU H'0004'
SSPM3 EQU H'0003'
SSPM2 EQU H'0002'
SSPM1 EQU H'0001'
SSPM0 EQU H'0000'
;----- SSPCON2 Bits --------------------------------------------------------
GCEN EQU H'0007'
ACKSTAT EQU H'0006'
ACKDT EQU H'0005'
ACKEN EQU H'0004'
RCEN EQU H'0003'
PEN EQU H'0002'
RSEN EQU H'0001'
SEN EQU H'0000'
;----- ADCON0 Bits --------------------------------------------------------
ADCS1 EQU H'0007'
ADCS0 EQU H'0006'
CHS2 EQU H'0005'
CHS1 EQU H'0004'
CHS0 EQU H'0003'
GO EQU H'0002'
NOT_DONE EQU H'0002'
DONE EQU H'0002'
GO_DONE EQU H'0002'
ADON EQU H'0000'
;----- ADCON1 Bits --------------------------------------------------------
ADFM EQU H'0007'
ADCS2 EQU H'0006'
PCFG3 EQU H'0003'
PCFG2 EQU H'0002'
PCFG1 EQU H'0001'
PCFG0 EQU H'0000'
;----- CCP1CON Bits -------------------------------------------------------
DC1B1 EQU H'0005'
CCP1X EQU H'0005' ; For backward compatibility
DC1B0 EQU H'0004'
CCP1Y EQU H'0004' ; For backward compatibility
CCP1M3 EQU H'0003'
CCP1M2 EQU H'0002'
CCP1M1 EQU H'0001'
CCP1M0 EQU H'0000'
;----- CCP2CON Bits -------------------------------------------------------
DC2B1 EQU H'0005'
CCP2X EQU H'0005' ; For backward compatibility
DC2B0 EQU H'0004'
CCP2Y EQU H'0004' ; For backward compatibility
CCP2M3 EQU H'0003'
CCP2M2 EQU H'0002'
CCP2M1 EQU H'0001'
CCP2M0 EQU H'0000'
;----- T3CON Bits ---------------------------------------------------------
RD16 EQU H'0007'
T3CCP2 EQU H'0006'
T3CKPS1 EQU H'0005'
T3CKPS0 EQU H'0004'
T3CCP1 EQU H'0003'
NOT_T3SYNC EQU H'0002'
T3SYNC EQU H'0002'
T3INSYNC EQU H'0002' ; Backward compatibility only
TMR3CS EQU H'0001'
TMR3ON EQU H'0000'
;----- TXSTA Bits ---------------------------------------------------------
CSRC EQU H'0007'
TX9 EQU H'0006'
NOT_TX8 EQU H'0006' ; Backward compatibility only
TX8_9 EQU H'0006' ; Backward compatibility only
TXEN EQU H'0005'
SYNC EQU H'0004'
BRGH EQU H'0002'
TRMT EQU H'0001'
TX9D EQU H'0000'
TXD8 EQU H'0000' ; Backward compatibility only
;----- RCSTA Bits ---------------------------------------------------------
SPEN EQU H'0007'
RX9 EQU H'0006'
RC9 EQU H'0006' ; Backward compatibility only
NOT_RC8 EQU H'0006' ; Backward compatibility only
RC8_9 EQU H'0006' ; Backward compatibility only
SREN EQU H'0005'
CREN EQU H'0004'
ADDEN EQU H'0003'
FERR EQU H'0002'
OERR EQU H'0001'
RX9D EQU H'0000'
RCD8 EQU H'0000' ; Backward compatibility only
;----- IPR2 Bits ----------------------------------------------------------
BCLIP EQU H'0003'
LVDIP EQU H'0002'
TMR3IP EQU H'0001'
CCP2IP EQU H'0000'
;----- PIR2 Bits ----------------------------------------------------------
BCLIF EQU H'0003'
LVDIF EQU H'0002'
TMR3IF EQU H'0001'
CCP2IF EQU H'0000'
;----- PIE2 Bits ----------------------------------------------------------
BCLIE EQU H'0003'
LVDIE EQU H'0002'
TMR3IE EQU H'0001'
CCP2IE EQU H'0000'
;----- IPR1 Bits ----------------------------------------------------------
PSPIP EQU H'0007'
ADIP EQU H'0006'
RCIP EQU H'0005'
TXIP EQU H'0004'
SSPIP EQU H'0003'
CCP1IP EQU H'0002'
TMR2IP EQU H'0001'
TMR1IP EQU H'0000'
;----- PIR1 Bits ----------------------------------------------------------
PSPIF EQU H'0007'
ADIF EQU H'0006'
RCIF EQU H'0005'
TXIF EQU H'0004'
SSPIF EQU H'0003'
CCP1IF EQU H'0002'
TMR2IF EQU H'0001'
TMR1IF EQU H'0000'
;----- PIE1 Bits ----------------------------------------------------------
PSPIE EQU H'0007'
ADIE EQU H'0006'
RCIE EQU H'0005'
TXIE EQU H'0004'
SSPIE EQU H'0003'
CCP1IE EQU H'0002'
TMR2IE EQU H'0001'
TMR1IE EQU H'0000'
;==========================================================================
;
; I/O Pin Name Definitions
;
;==========================================================================
;----- PORTA ------------------------------------------------------------------
RA0 EQU 0
AN0 EQU 0
RA1 EQU 1
AN1 EQU 1
RA2 EQU 2
AN2 EQU 2
VREFP EQU 2
RA3 EQU 3
AN3 EQU 3
VREFM EQU 3
RA4 EQU 4
T0CKI EQU 4
RA5 EQU 5
AN4 EQU 5
SS EQU 5
LVDIN EQU 5
RA6 EQU 6
;----- PORTB ------------------------------------------------------------------
RB0 EQU 0
INT0 EQU 0
RB1 EQU 1
INT1 EQU 1
RB2 EQU 2
INT2 EQU 2
RB3 EQU 3
CCP2A EQU 3
RB4 EQU 4
RB5 EQU 5
RB6 EQU 6
RB7 EQU 7
;----- PORTC ------------------------------------------------------------------
RC0 EQU 0
T1OSO EQU 0
T1CKI EQU 0
RC1 EQU 1
T1OSI EQU 1
CCP2 EQU 1
RC2 EQU 2
CCP1 EQU 2
RC3 EQU 3
SCK EQU 3
SCL EQU 3
RC4 EQU 4
SDI EQU 4
SDA EQU 4
RC5 EQU 5
SDO EQU 5
RC6 EQU 6
TX EQU 6
CK EQU 6
RC7 EQU 7
RX EQU 7
;****DT EQU 7 ;*** Not Available due to conflict with
;*** Define Table (DT) directive
;==========================================================================
;==========================================================================
;
; RAM Definition
;
;==========================================================================
; __MAXRAM H'1FF'
;==========================================================================
;
; Configuration Bits
;
; Data Sheet Include File Address
; CONFIG1L = Configuration Byte 0 300000h
; CONFIG1H = Configuration Byte 1 300001h
; CONFIG2L = Configuration Byte 3 300002h
; CONFIG2H = Configuration Byte 4 300003h
; CONFIG3L = Configuration Byte 5 300004h
; CONFIG3H = Configuration Byte 6 300005h
; CONFIG4L = Configuration Byte 7 300006h
; CONFIG4H = Configuration Byte 8 300007h
;
;==========================================================================
;
;Configuration Byte 0 Options
_CP_ON_0 EQU H'00' ; Code Protect enable
_CP_OFF_0 EQU H'FF'
;Configuration Byte 1 Options
_OSCS_ON_1 EQU H'DF' ; Oscillator Switch enable
_OSCS_OFF_1 EQU H'FF'
_LP_OSC_1 EQU H'F8' ; Oscillator type
_XT_OSC_1 EQU H'F9'
_HS_OSC_1 EQU H'FA'
_RC_OSC_1 EQU H'FB'
_EC_OSC_1 EQU H'FC' ; External Clock w/OSC2 output divide by 4
_ECIO_OSC_1 EQU H'FD' ; w/OSC2 as an IO pin (RA6)
_HSPLL_OSC_1 EQU H'FE' ; HS PLL
_RCIO_OSC_1 EQU H'FF' ; RC w/OSC2 as an IO pin (RA6)
;Configuration Byte 2 Options
_BOR_ON_2 EQU H'FF' ; Brown-Out Reset enable
_BOR_OFF_2 EQU H'FD'
_PWRT_OFF_2 EQU H'FF' ; Power-Up Timer enable
_PWRT_ON_2 EQU H'FE'
_BORV_25_2 EQU H'FF' ; BOR Voltage - 2.5v
_BORV_27_2 EQU H'FB' ; 2.7v
_BORV_42_2 EQU H'F7' ; 4.2v
_BORV_45_2 EQU H'F3' ; 4.5v
;Configuration Byte 3 Options
_WDT_ON_3 EQU H'FF' ; Watch Dog Timer enable
_WDT_OFF_3 EQU H'FE'
_WDTPS_128_3 EQU H'FF' ; Watch Dog Timer PostScaler count
_WDTPS_64_3 EQU H'FD'
_WDTPS_32_3 EQU H'FB'
_WDTPS_16_3 EQU H'F9'
_WDTPS_8_3 EQU H'F7'
_WDTPS_4_3 EQU H'F5'
_WDTPS_2_3 EQU H'F3'
_WDTPS_1_3 EQU H'F1'
;Configuration Byte 5 Options
_CCP2MX_ON_5 EQU H'FF' ; CCP2 pin Mux enable
_CCP2MX_OFF_5 EQU H'FE'
;Configuration Byte 6 Options
_STVR_ON_6 EQU H'FF' ; Stack over/underflow Reset enable
_STVR_OFF_6 EQU H'FE'
; To use the Configuration Bits, place the following lines in your source code
; in the following format, and change the configuration value to the desired
; setting (such as CP_OFF to CP_ON). These are currently commented out here
; and each __CONFIG line should have the preceding semicolon removed when
; pasted into your source code.
; The following is a assignment of address values for all of the configuration
; registers for the purpose of table reads
_CONFIG0 EQU H'300000'
_CONFIG1 EQU H'300001'
_CONFIG2 EQU H'300002'
_CONFIG3 EQU H'300003'
_CONFIG4 EQU H'300004'
_CONFIG5 EQU H'300005'
_CONFIG6 EQU H'300006'
_CONFIG7 EQU H'300007'
;Program Configuration Register 0
; __CONFIG _CONFIG0, _CP_OFF_0
;Program Configuration Register 1
; __CONFIG _CONFIG1, _OSCS_OFF_1 & _RCIO_OSC_1
;Program Configuration Register 2
; __CONFIG _CONFIG2, _BOR_ON_2 & _BORV_25_2 & _PWRT_OFF_2
;Program Configuration Register 3
; __CONFIG _CONFIG3, _WDT_ON_3 & _WDTPS_128_3
;Program Configuration Register 5
;__CONFIG _CONFIG5, _CCP2MX_ON_5
;Program Configuration Register 6
; __CONFIG _CONFIG6, _STVR_ON_6
;==========================================================================
LIST
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