/* * (C) Copyright 2000 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Marius Groeger <mgroeger@sysgo.de> * * Configuation settings for the EP7312 board. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#ifndef __CONFIG_H#define __CONFIG_H/* * If we are developing, we might want to start armboot from ram * so we MUST NOT initialize critical regs like mem-timing ... */#define CONFIG_INIT_CRITICAL            /* undef for developing *//* * High Level Configuration Options * (easy to change) */#define CONFIG_ARM7		1	/* This is a ARM7 CPU	*/#define CONFIG_EP7312		1	/* on an EP7312 Board      */#define CONFIG_ARM_THUMB	1	/* this is an ARM720TDMI */#undef  CONFIG_ARM7_REVD	 	/* disable ARM720 REV.D Workarounds */#undef CONFIG_USE_IRQ			/* don't need them anymore *//* * Size of malloc() pool */#define CONFIG_MALLOC_SIZE	(CFG_ENV_SIZE + 128*1024)/* * Hardware drivers */#define CONFIG_DRIVER_CS8900	1	/* we have a CS8900 on-board */#define CS8900_BASE		0x20000000#define CS8900_BUS16		1#undef  CS8900_BUS32/* * select serial console configuration */#define CONFIG_SERIAL1		1	/* we use Serial line 1 *//* allow to overwrite serial and ethaddr */#define CONFIG_ENV_OVERWRITE#define CONFIG_BAUDRATE		9600#define CONFIG_BOOTP_MASK       (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | CFG_CMD_JFFS2)/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */#include <cmd_confdefs.h>#define CONFIG_BOOTDELAY	3#define CONFIG_BOOTARGS    	"devfs=mount root=ramfs console=ttyS0,9600"#define CONFIG_ETHADDR	08:00:3e:21:c7:f7//#define CONFIG_NETMASK        255.255.0.0//#define CONFIG_IPADDR		172.22.2.128//#define CONFIG_SERVERIP	172.22.2.126//#define CONFIG_BOOTFILE	"impa7"#define CONFIG_BOOTCOMMAND	"bootp;bootm"#if (CONFIG_COMMANDS & CFG_CMD_KGDB)#define CONFIG_KGDB_BAUDRATE	230400		/* speed to run kgdb serial port */#define CONFIG_KGDB_SER_INDEX	2		/* which serial port to use */#endif/* * Miscellaneous configurable options */#define	CFG_LONGHELP				/* undef to save memory		*/#define	CFG_PROMPT		"EP7312 # "	/* Monitor Command Prompt	*/#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */#define	CFG_MAXARGS		16		/* max number of command args	*/#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/#define CFG_MEMTEST_START	0xc0400000	/* memtest works on	*/#define CFG_MEMTEST_END		0xc0800000	/* 4 ... 8 MB in DRAM	*/#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */#define	CFG_LOAD_ADDR		0xc0500000	/* default load address	*/#define	CFG_HZ			2000		/* decrementer freq: 2 kHz */						/* valid baudrates */#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }#ifndef __ASSEMBLY__/*----------------------------------------------------------------------- * Board specific extension for bd_info * * This structure is embedded in the global bd_info (bd_t) structure * and can be used by the board specific code (eg board/...) */struct bd_info_ext{    /* helper variable for board environment handling     *     * env_crc_valid == 0    =>   uninitialised     * env_crc_valid  > 0    =>   environment crc in flash is valid     * env_crc_valid  < 0    =>   environment crc in flash is invalid     */     int	env_crc_valid;};#endif/*----------------------------------------------------------------------- * Stack sizes * * The stack sizes are set up in start.S using the settings below */#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */#ifdef CONFIG_USE_IRQ#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */#endif/*----------------------------------------------------------------------- * Physical Memory Map */#define CONFIG_NR_DRAM_BANKS	1	   /* we have 2 banks of DRAM */#define PHYS_SDRAM_1		0xc0000000 /* SDRAM Bank #1 */#define PHYS_SDRAM_1_SIZE	0x01000000 /* 16 MB */#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */#define PHYS_FLASH_SIZE		0x01000000 /* 16 MB */#define CFG_FLASH_BASE		PHYS_FLASH_1/*----------------------------------------------------------------------- * FLASH and environment organization */#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/#define CFG_MAX_FLASH_SECT	128	/* max number of sectors on one chip	*//* timeout values are in ticks */#define CFG_FLASH_ERASE_TOUT	(2*CFG_HZ) /* Timeout for Flash Erase */#define CFG_FLASH_WRITE_TOUT	(2*CFG_HZ) /* Timeout for Flash Write */#define CFG_ENV_ADDR		(PHYS_FLASH_1 + 0x20000)	/* Addr of Environment Sector	*/#define CFG_ENV_SIZE		0x20000	/* Total Size of Environment Sector	*//* Flash banks JFFS2 should use */#define CFG_JFFS2_FIRST_BANK    0#define CFG_JFFS2_FIRST_SECTOR	2#define CFG_JFFS2_NUM_BANKS     1#endif	/* __CONFIG_H */