/*
**************************************************************************************
*                            Copyright (c) 2005 vBridge Microsystem, Inc.  
*                                  Unpublished & Not for Publication
*                                        All Rights Reserved                   
*   
* File        : 28F640J3.c                     
*                                                                         
* Description : 
*             
* Date        :                                                            
**************************************************************************************
*/
#include "config.h"

#ifdef INCLUDE_NOR_FLASH_S29GL128M90
#ifdef INCLUDE_FLASH


#include "pif.h"
#include "S29GL128M90.h"
#include "flash.h"
#include "Def_type.h"

#define INTEL_DT28F128J5		0x00890018
#define INTEL_28F640			0x00890017
#define INTEL_DT28F640J5		0x00890015
#define ST_M58LW064D		0x00200017
#define ST_M25P64			0x00172020
#define S29GL128M90			0x0001227e

typedef unsigned char uchar;
extern char *boot_device_name;


/*
**************************************************************************************
*                                       NorFlashPifInit
*
* Description: initialize the PCMCIA interface
*
* Arguments  : devID     controls which PCMCIA device to access. 
*                                  0 – CS0
*                                  1 – CS1
*                                  2 – CS2
*                                  3 – CS3
*                            For Virtex-4, devID = 0.
*
* Return     : none
*
* Note(s)    : Before any Nor flash operations, you should call it at first.
**************************************************************************************
*/
/*4> word 0xa80a0000
0x04000000
5> word 0xa80a0010
0x890F0FFF
6>*/ 
void NorFlashPifInit(void)
{
    unsigned int tmp;
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    
    PifTimingRegSet(0xf /* setup */, 0xf /* hold */, 0xf /* interval */, \
                    0xf /* wait_cycle */, PIF_NO_WAIT /* ioack_wait */, \
                    PCMCIA_WIDTH_16BIT /* pcmcia_width */, PCMCIA_NO_CHECK /* wait */, \
                    PCMCIA_INSERT_IDLE /* swait */, PIF_CS0 /* devID */, \
                    PIF_OE /* xfr_type */);
    
    PIF_INTR_DIS();       // Disable the PIF interrupts
    PIF_DONE_CLEAR();     // Clear the bit done
    
    tmp = *(unsigned int *)0xa80a001c;
    tmp &= 0x7fffffff;
    *(unsigned int *)0xa80a001c = tmp;
	*(volatile unsigned *)(0xa8010020) =0x80000004;
}

/*
*********************************************************************************************
*                                       NorFlashErase
*
* Description: erase one specified block.
*
* Arguments  : block_no     is the block number. 
*
* Return     : SUCCESSFUL  shows the erasure is successful.
*              FAILED      shows the erasure is failed.
*
* Note(s)    : 
*********************************************************************************************
*/
int NorFlashErase(int block_no)
{
    short status;
    	
#if 0
    /* the first cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR;    // the byte address
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_ERASE_BLOCK1;
    
    PifWaitTillDone();         // Wait till the first cycle complete
    
    /* the second cycle of block erase */	
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_ERASE_BLOCK2;
    
    PifWaitTillDone();         // Wait till the second cycle complete
#endif    

    /* the first cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0xaa;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the second cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0x554;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x55;
    PifWaitTillDone();         // Wait till the first cycle complete
    
    /* the third cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x80;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the fourth cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0xaa;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the fifth cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0x554;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x55;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the sixth cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    //rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR ;    // the byte address
    rPIF_PCI_DEV_A = block_no * NOR_FLASH_BYTES_PER_SECTOR * 2;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x30;
    PifWaitTillDone();         // Wait till the first cycle complete


    status = 0x0;
    while(!(status & 0x80)) {     // Flash is busy?
        NorFlashRd(rPIF_PCI_DEV_A, &status, 1);
    }
   // printf("Erase OK Status %d  !\r\n", status);    	    
	
    //if(status & 0x20)             // Whether the SR4 or SR5 is set
    //    return FAILED;
    return SUCCESSFUL;
}

/*
*********************************************************************************************
*                                       NorFlashProg
*
* Description: program a half-word into the specified address
*
* Arguments  : addr     is the byte address. 
*              data     is the half-word to be programmed.
*
* Return     : SUCCESSFUL  shows the erasure is successful.
*              FAILED      shows the erasure is failed.
*
* Note(s)    : 
*********************************************************************************************
*/
int NorFlashProg(int addr, short data)
{
    short status;

    addr = addr * 1;

    /* the first cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0xaa;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the second cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0x554;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x55;
    PifWaitTillDone();         // Wait till the first cycle complete
    
    /* the third cycle */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_PROG_WORD;
    PifWaitTillDone();         // Wait till the first cycle complete
    
    /* the fourth cycle */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = addr;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = data;
    PifWaitTillDone();         // Wait till the second cycle complete
    
    status = 0x0;
    
    while(!((status&0x80) == (data&0x80))) {     // Flash is busy?
        NorFlashRd(addr, &status, 1);
    }
   HwDelayUs(100);
    //printf("Program OK addr %d  !\r\n", addr);    	    
    //if(status & 0x22)             // Whether the SR1 SR3 or SR4 is set
    //    return FAILED;
    return SUCCESSFUL;
}

/*
*********************************************************************************************
*                                       NorFlashClrSR
*
* Description: clr the flash status.
*
* Arguments  : none
*
* Return     : none
*
* Note(s)    : If FAILED returns after program or erase operation, 
*              you should run NorFlashClrSR before the next program or erase operation. 
*              The function does not verify.
*********************************************************************************************
*/
void NorFlashClrSR(void)
{           	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_CL_SR;
    
    PifWaitTillDone();         // Wait till the first cycle complete	            
}

/*
*********************************************************************************************
*                                       NorFlashRdSR
*
* Description: read the flash status.
*
* Arguments  : none
*
* Return     : the flash status
*
* Note(s)    : 
*********************************************************************************************
*/
short NorFlashRdSR(void)
{   
    short status;
    	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_RD_SR;
    
    PifWaitTillDone();         // Wait till the first cycle complete	
    
    NorFlashRd(0, &status, 1);
    return(status);
}

short NorFlashRdManufacturerID(void)
{
   	short mID;
	    /* the first cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0xaa;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the second cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0x554;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x55;
    PifWaitTillDone();         // Wait till the first cycle complete
        	  /* the third cycle */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_RD_ID;
    PifWaitTillDone();         // Wait till the first cycle complete
    
    
    NorFlashRd(0, &mID, 1);	return mID;
}

short NorFlashRdDeviceID(void)
{
   	short deviceID;
	    /* the first cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0xaa;
    PifWaitTillDone();         // Wait till the first cycle complete

    /* the second cycle of block erase */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0x554;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = 0x55;
    PifWaitTillDone();         // Wait till the first cycle complete
        	  /* the third cycle */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    rPIF_PCI_DEV_A = 0xaaa;    // the byte address
    
    PifPCMCIAModeRegSet(PIF_CBUS_MODE, PCMCIA_MSTR_BS_8BYTE);    
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_RD_ID;
    PifWaitTillDone();         // Wait till the first cycle complete
    
    
    NorFlashRd(2, &deviceID, 1);	return deviceID;
}


int NorFlashRdID(void)
{
    short mid,did;

	mid = NorFlashRdManufacturerID();
	did = NorFlashRdDeviceID();

	return (mid<<16 | did);
}

/*
*********************************************************************************************
*                                       NorFlashRdData
*
* Description: read the data from the specified address.
*
* Arguments  : start_addr       is the start byte address.
*              data             is the data pointer.
*              number           is the data of number to be read. It is counted by half-words.
*
* Return     : none.
*
* Note(s)    : 
*********************************************************************************************
*/
void NorFlashRdData(int start_addr, short *data, int number)
{
    int i;	
#if 1	
    /* The read array command */	
    PIF_WRITE_SET();
    rPIF_PCI_LEN = 2;
    PIF_START();
    rPIF_PCMCIA_DATA = NOR_FLASH_RD_ARRAY;
    
    PifWaitTillDone();           // Wait till the first cycle complete
 #endif   
    NorFlashRd(start_addr, data, number);    	
}

/*
*********************************************************************************************
*                                       NorFlashRdDataBurst
*
* Description: read the data from the specified address.
*
* Arguments  : start_addr       is the start byte address.
*              data             is the data pointer.
*              number           is the data of number to be read. It is counted by half-words.
*                               Maximum is 2047.