-- Copyright(C) 2007 by Xilinx, Inc. All rights reserved. 
-- The files included in this design directory contain proprietary, confidential information of 
-- Xilinx, Inc., are distributed under license from Xilinx, Inc., and may be used, copied 
-- and/or disclosed only pursuant to the terms of a valid license agreement with Xilinx, Inc. 
-- This copyright notice must be retained as part of this text at all times.  

This zip file contains the design files for the ISE 9.1 In-depth tutorial (Verilog design flow).
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Installation instructions
--------------------------
Unzip the file into a directory with READ/Write permissions.
 
Documentation
-------------
Refer to the ISE 9.1 In-depth tutorial available at:
http://support.xilinx.com/support/techsup/tutorials/index.htm



For support information and contacts please see:

	http://support.xilinx.com
or
	http://support.xilinx.com/support/services/contact_info.htm