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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN"><html><head><link rel="STYLESHEET" type="text/css" href="wrs.css"><title> PowerPC </title></head><body bgcolor="FFFFFF"><p class="navbar" align="right"><a href="index.html"><img border="0" alt="[Contents]" src="icons/contents.gif"></a><a href="GuideIX.html"><img border="0" alt="[Index]" src="icons/index.gif"></a><a href="x-ppc.html"><img border="0" alt="[Top]" src="icons/top.gif"></a><a href="x-ppc2.html"><img border="0" alt="[Prev]" src="icons/prev.gif"></a><a href="x-ppc4.html"><img border="0" alt="[Next]" src="icons/next.gif"></a></p><font face="Helvetica, sans-serif" class="sans"><h3 class="H2"><i><a name="84479">F.3 Interface Changes</a></i></h3></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="84480"> </a>This section describes particular routines and tools that are specific to PowerPC targets in any of the following ways:</p></dl><dl class="margin"><p class="listspace"><ul class="Bullet" type="disc"><li><a name="84481"> </a>available only for PowerPC targets </li></ul></p><p class="listspace"><ul class="Bullet" type="disc"><li><a name="84482"> </a>parameters specific to PowerPC targets </li></ul></p><p class="listspace"><ul class="Bullet" type="disc"><li><a name="84483"> </a>special restrictions or characteristics on PowerPC targets </li></ul></p></dl><dl class="margin"><dd><p class="Body"><a name="84484"> </a>For complete documentation, see the online documentation. </p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="84487">Memory Management Unit</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="84488"> </a>VxWorks provides two levels of virtual memory support: the basic level bundled with VxWorks, and the full level that requires the optional product VxVMI.Check with your sales representative for the availability of VxVMI for PowerPC.</p><dd><p class="Body"><a name="84492"> </a>For detailed information on VxWorks MMU support, see <a href="c-vm.html#84369"><i class="title">7. Virtual Memory Interface</i></a>. The following subsections augment the information in that chapter.</p></dl></dl><dl class="margin"><dd><font face="Helvetica, sans-serif" size="-1" class="sans"><h5 class="HU"><i><a name="84494">Instruction and Data MMU</a></i></h5></font><dl class="margin"><dd><p class="Body"><a name="84495"> </a>The PowerPC MMU introduces a distinction between instruction and data MMU and allows them to be separately enabled or disabled. Two parameters, <b class="symbol_UC">USER_I_MMU_ENABLE</b> and <b class="symbol_UC">USER_D_MMU_ENABLE</b>, are enabled by default in the <b class="guiLabel"><font face="Helvetica, sans-serif" size="-1" class="sans">Params</font></b> tab of the <b class="guiLabel"><font face="Helvetica, sans-serif" size="-1" class="sans">Properties</font></b> window under <b class="symbol_UC">SELECT_MMU</b>. To enable/disable one or both MMUs, select the corresponding parameter and remove the <b class="symbol_UC">TRUE</b>.</p></dl><dd><font face="Helvetica, sans-serif" size="-1" class="sans"><h5 class="HU"><i><a name="84498">60X Memory Mapping</a></i></h5></font><dl class="margin"><dd><p class="Body"><a name="84499"> </a>The PowerPC 603 and 604 MMU supports two models for memory mapping. The first, the BAT model, allows mapping of a memory block ranging in size from 128KB to 256MB into a BAT register. The second, the segment model, gives the ability to map the memory in pages of 4KB. Tornado for PowerPC supports both memory models.</p></dl><dl class="margin"><b class="HU-bullet"><li><a name="84500"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">603/604 Block Address Translation Model</font></li></b></dl><dl class="margin"><dd><p class="Body"><a name="84502"> </a>The size of a BAT register is two words of 32 bits. For the PowerPC 603 and PowerPC 604, eight BAT registers are implemented: four for the instruction MMU and four for the data MMU. </p><dd><p class="Body"><a name="84503"> </a>The data structure <b class="keyword">sysBatDesc[]</b>, defined in <b class="file">sysLib.c</b>, handles the BAT register configuration. The registers will be set by the initialization software in the MMU library. By default these registers are cleared and set to zero.</p><dd><p class="Body"><a name="84504"> </a>All the configuration constants used to fill the <b class="keyword">sysBatDesc[]</b> are defined in <i class="textVariable">installDir</i><b class="file">/target/h/arch/ppc/mmu603Lib.h</b> for both the PowerPC 603 and the PowerPC 604.</p></dl><dl class="margin"><b class="HU-bullet"><li><a name="84505"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">603/604 Segment Model</font></li></b></dl><dl class="margin"><dd><p class="Body"><a name="84507"> </a>This model specifies the configuration for each memory page. The entire physical memory is described by the data structure <b class="keyword">sysPhysMemDesc[]</b>, defined in <b class="file">sysLib.c</b>. This data structure is made up of configuration constants for each page or group of pages. All the configuration constants defined in <a href="c-vm3.html#84401">Table 7-1</a> of <a href="c-vm.html#84369"><i class="title">7. Virtual Memory Interface</i></a> are available for PowerPC virtual memory pages.</p><dd><p class="Body"><a name="84519"> </a>Use of the <b class="symbol_UC">VM_STATE_CACHEABLE</b> constant listed in <a href="c-vm3.html#84401">Table 7-1</a> for each page or group of pages, sets the cache to copy-back mode.</p><dd><p class="Body"><a name="84520"> </a>In addition to <b class="symbol_UC">VM_STATE_CACHEABLE</b>, the following additional constants are supported:</p></dl><dl class="margin"><ul class="DashSingle" type="circle"><li><a name="84521"> </a><b class="symbol_UC">VM_STATE_CACHEABLE_WRITETHROUGH</b> </li></ul><ul class="DashSingle" type="circle"><li><a name="84523"> </a><b class="symbol_UC">VM_STATE_MEM_COHERENCY</b> </li></ul><ul class="DashSingle" type="circle"><li><a name="84525"> </a><b class="symbol_UC">VM_STATE_MEM_COHERENCY_NOT</b> </li></ul><ul class="DashSingle" type="circle"><li><a name="84527"> </a><b class="symbol_UC">VM_STATE_GUARDED</b> </li></ul><ul class="DashSingle" type="circle"><li><a name="84529"> </a><b class="symbol_UC">VM_STATE_GUARDED_NOT</b> </li></ul></dl><dl class="margin"><dd><p class="Body"><a name="84531"> </a>The first constant sets the page descriptor cache mode field in cacheable write-through mode. Cache coherency and guarded modes are controlled by the other constants.</p><dd><p class="Body"><a name="84532"> </a>For more information regarding cache modes, refer to <i class="title">PowerPC Microprocessor Family: The Programming Environments.</i></p><dd><p class="Body"><a name="84533"> </a>For more information on memory page states, state flags, and state masks, see <a href="c-vm.html#84369"><i class="title">7. Virtual Memory Interface</i></a>.</p><dd><p class="Body"><a name="84537"> </a>The page table size depends on the total memory to be mapped. The larger the memory to be mapped, the bigger the page table will be. The VxWorks implementation of the segment model follows the recommendations given in <i class="title">PowerPC Microprocessor Family: The Programming Environments</i>. During MMU library initialization, the total size of the memory to be mapped is computed, allowing dynamic determination of the page table size. The following table shows the correspondence between the total amount of memory to map and the page table size.<p class="table"><h4 class="EntityTitle"><a name="84543"><font face="Helvetica, sans-serif" size="-1" class="sans">Table 9-4: Page table size </font></a></h4><table border="0" cellpadding="0" cellspacing="0"><tr><td colspan="20"><hr class="tablerule"></td></tr><tr valign="middle"><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="84547"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Total Memory to map</font></b></div></th><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="84549"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Page table size</font></b></div></th></tr><tr><td colspan="20"><hr class="tablerule2"></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84551"> </a>8 MB or less </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84553"> </a>64 KB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84555"> </a>16 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84557"> </a>128 KB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84559"> </a>32 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84561"> </a>256 KB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84563"> </a>64 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84565"> </a>512 KB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84567"> </a>128 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84569"> </a>1 MB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84571"> </a>256 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84573"> </a>2 MB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84575"> </a>512 MB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84577"> </a>4 MB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84579"> </a>1 GB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84581"> </a>8 MB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84583"> </a>2 GB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84586"> </a>16 MB </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="84588"> </a>4 GB </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="84591"> </a>32 MB </div></td></tr><tr><td colspan="20"><hr class="tablerule"></td></tr><tr valign="middle"><td colspan="20"></td></tr></table></p></p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="84592">HI and HIADJ Macros</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86183"> </a>The <b class="symbol_UC">HI</b> and <b class="symbol_UC">HIADJ</b> macros are used in PowerPC assembly code. The macro <b class="symbol_UC">HI</b><b class="symbol_lc">(x)</b> is the simple high order 16 bits of the value <b class="symbol_lc">x</b>. The macro <b class="symbol_UC">HIADJ</b><b class="symbol_lc">(x)</b> is the high order 16 bits adjusted by bit 15. If bit 15 is set, then the value is adjusted by adding 1. </p><dd><p class="Body"><a name="86221"> </a>The macro <b class="symbol_UC">HIADJ</b><b class="symbol_lc">(x)</b> must be used whenever the low order 16 bits are to be used with an instruction that interprets them as a signed quantity (for instance, <b class="symbol_lc">addi</b>, <b class="symbol_lc">lwz</b>). If the low order bits are used in an instruction that interprets them as an unsigned quantity (for instance, <b class="symbol_lc">ori</b>) then the proper macro is <b class="symbol_UC">HI</b>, not <b class="symbol_UC">HIADJ</b>.</p><dd><p class="Body"><a name="86224"> </a>For example, addi uses a SIGNED quantity, so <b class="symbol_UC">HIADJ</b> is the proper macro:</p><dl class="margin"><dd><pre class="Code2"><b><a name="86226">lis rx, HIADJ(VALUE) addi rx, rx, LO(VALUE)</a></b></pre></dl><dd><p class="Body"><a name="86206"> </a>However, ori uses an UNSIGNED quantity, so <b class="symbol_UC">HI</b> is the proper macro:</p><dl class="margin"><dd><pre class="Code2"><b><a name="86421">lis rx, HI(VALUE) ori rx, rx, LO(VALUE)</a></b></pre></dl></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="86422">ELF-Specific Tools</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86423"> </a>The following tools are specific to the ELF format. For more information, see the reference entries for each tool.</p></dl><dl class="margin"><dd><div class="Item"><a name="84595"> </a><b class="command">elfHex </b></div><dl class="margin"><dd><div class="Indent"><a name="84596"> </a>converts an ELF-format object file into Motorola hex records. The syntax is:</div><br><dl class="margin"><dd><pre class="Code3"><b><a name="84597">elfHex [-a <i class="textVariable">adrs</i>] [-l] [-v] [-p <i class="textVariable">PC</i>] [-s <i class="textVariable">SP</i>] <i class="textVariable">file</i> </a></b></pre></dl></dl><dd><div class="Item"><a name="84599"> </a><b class="command">elfToBin </b></div><dl class="margin"><dd><div class="Indent"><a name="84600"> </a>extracts text and data segments from an ELF file. The syntax is:</div><br><dl class="margin"><dd><pre class="Code3"><b><a name="84601">elfToBin < <i class="textVariable">inFile</i> > <i class="textVariable">outfile</i> </a></b></pre></dl></dl><dd><div class="Item"><a name="84603"> </a><b class="command">elfXsyms </b></div><dl class="margin"><dd><div class="Indent"><a name="84604"> </a>extracts the symbol table from an ELF file. The syntax is:</div><br><dl class="margin"><dd><pre class="Code3"><b><a name="84606">elfXsyms < <i class="textVariable">objMod</i> > <i class="textVariable">symTbl</i> </a></b></pre></dl></dl></dl></dl><a name="foot"><hr></a><p class="navbar" align="right"><a href="index.html"><img border="0" alt="[Contents]" src="icons/contents.gif"></a><a href="GuideIX.html"><img border="0" alt="[Index]" src="icons/index.gif"></a><a href="x-ppc.html"><img border="0" alt="[Top]" src="icons/top.gif"></a><a href="x-ppc2.html"><img border="0" alt="[Prev]" src="icons/prev.gif"></a><a href="x-ppc4.html"><img border="0" alt="[Next]" src="icons/next.gif"></a></p></body></html><!---by WRS Documentation (), Wind River Systems, Inc. conversion tool: Quadralay WebWorks Publisher 4.0.11 template: CSS Template, Jan 1998 - Jefro --->?? 快捷鍵說明
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