////////////////////////////////////////////////////////////////////////////////
//
//  File:  lnk51ew_cc2430b.xcl
//  Date:  2006.11.21-15:48
//
//  Description:
//    This is a extended command line file for XLINK tool to be used when
//    debug applications written for the Chipcon CC2430.
//
//  Important:
//    Data cannot be located at address zero, this address is reserved for
//    the null pointer.
//
////////////////////////////////////////////////////////////////////////////////



////////////////////////////////////////////////////////////////////////////////
//
// Variables (used by lnk_base.xcl)
// ================================
//
// Segment limits
// --------------
//
//
//    IDATA
//
-D_IDATA_END=0xFF              // Last address of Idata memory
//
//
//    PDATA
//
-D_PDATA_START=0xEF00          // First address for PDATA memory.
-D_PDATA_END=0xEFFF            // Last address for PDATA memory.
//
//
//
//
//    IXDATA
//
-D_IXDATA_START=0xF000         // The internal xdata is 4k.
// The end limit is 2 bytes lower on CC2430/31 for rev. D, compared to rev. A, B and C 
//-D_IXDATA_END=0xFD57         // Revision A, B and C
-D_IXDATA_END=0xFD55           // Revison D (this setting is safe for all revisions)
//                                FD56 (FD58) to FEFF used for reg savings
//                                FF00 to FFFF mapped to IDATA
//
//
//    XDATA
//
// The internal XDATA is used as XDATA.
-D_XDATA_START=_IXDATA_START
-D_XDATA_END=_IXDATA_END
//
//
//    CODE
//
//                                Code size:
//                                 128k for CC2430-F128
-D_CODE_START=0x0000
-D_CODE_END=0x7FFF             // Last address for ROOT bank.
//
// Include the line below when generating hex file for banked code model
// -M(CODE)[(_CODEBANK_START+_FIRST_BANK_ADDR)-(_CODEBANK_END+_FIRST_BANK_ADDR)]*_NR_OF_BANKS+10000=0x8000
//
//    NEAR CODE
//
-D_NEAR_CODE_END=0x7FFF        // Last address for near code, near code segment is 32KB in banked code model.
//
//
//    TINY CODE
//
-D_TINY_CODE_END=0x7FF         // Last address for tiny code.
//
//
//
// Special SFRs
// ------------
//
//
//    CODE bank setup
//
-D_FIRST_BANK_ADDR=0x10000
-D_NR_OF_BANKS=0x03
//
//
//    Register bank setup
//
-D?REGISTER_BANK=0             // Default register bank (0,1,2,3).
-D_REGISTER_BANK_START=0       // Start address for default register bank (00,08,10,18).
//
//
//    PDATA page setup
//
-D?PBANK_NUMBER=EF             // High byte of 16-bit address to the PDATA area.
-D?PBANK=93                    // Most significant byte in MOVX A,@R0. (0x93 is sfr MPAGE).
//
//
//    Virtual register setup
//    ----------------------
//
-D_BREG_START=0x00             // The bit address where the BREG segments starts.
                               // Must be placed on: _BREG_START%8=0 where _BREG_START <= 0x78.
-D?VB=0x20                     // ?VB is used when referencing BREG as whole byte.
                               // Must be placed on: ?VB=0x20+_BREG_START/8.
//
////////////////////////////////////////////////////////////////////////////////



////////////////////////////////////////////////////////////////////////////////
//
// To the reader: Ignore this section ------------------------------------------
//
//
// Dummy definitions needed to satisfy lnk_base.xcl
//
//
-D_FAR_DATA_NR_OF_BANKS=0x0E   // Number of banks in far data memory.
-D_FAR_DATA_START=0x010001     // First address of far memory.
-D_FAR_DATA_END=0xFFFFFF       // Last address of far memory.
-D_FAR_CODE_START=_CODE_START  // First address for far code.
-D_FAR_CODE_END=_CODE_END      // Last address for far code.
//
////////////////////////////////////////////////////////////////////////////////



////////////////////////////////////////////////////////////////////////////////
//
// Include the lnk_base command file
// =================================
//
//
-f lnk_base.xcl
//
////////////////////////////////////////////////////////////////////////////////



////////////////////////////////////////////////////////////////////////////////
//
// Chipcon device specific
// =======================
//
//
// Setup of PM0 XDATA
// ------------------
//
-D_PM0_XDATA_START=E000        // The internal low power xdata is 4k.
-D_PM0_XDATA_END=EFFF
//
-Z(XDATA)PM0_XDATA=_PM0_XDATA_START-_PM0_XDATA_END
//
//
// Setup of CODE banks
// -------------------
//
-D_BANK1_START=0x18000
-D_BANK1_END=0x1FFFF
//
-D_BANK2_START=0x28000
-D_BANK2_END=0x2FFFF
//
-D_BANK3_START=0x38000
-D_BANK3_END=0x3FFFF
//
-P(CODE)BANK1=_BANK1_START-_BANK1_END
-P(CODE)BANK2=_BANK2_START-_BANK2_END
-P(CODE)BANK3=_BANK3_START-_BANK3_END
//
//
//
// IEEE address space
// ------------------
//
-D_IEEE_ADDRESS_SPACE_START=(_BANK3_END-7)
-D_IEEE_ADDRESS_SPACE_END=_BANK3_END
//
-Z(CODE)IEEE_ADDRESS_SPACE=_IEEE_ADDRESS_SPACE_START-_IEEE_ADDRESS_SPACE_END
//
////////////////////////////////////////////////////////////////////////////////