?? iocc1110.h
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SFR( _SFRAA , 0xAA ) /* not used */
SFR( FWT , 0xAB ) /* Flash Write Timing */
SFR( FADDRL , 0xAC ) /* Flash Address Low Byte */
SFR( FADDRH , 0xAD ) /* Flash Address High Byte */
SFR( FCTL , 0xAE ) /* Flash Control */
SFR( FWDATA , 0xAF ) /* Flash Write Data */
SFR( _SFRB0 , 0xB0 ) /* not used */
SFR( ENCDI , 0xB1 ) /* Encryption Input Data */
SFR( ENCDO , 0xB2 ) /* Encryption Output Data */
SFR( ENCCS , 0xB3 ) /* Encryption Control and Status */
SFR( ADCCON1 , 0xB4 ) /* ADC Control 1 */
SFR( ADCCON2 , 0xB5 ) /* ADC Control 2 */
SFR( ADCCON3 , 0xB6 ) /* ADC Control 3 */
SFR( _SFRB7 , 0xB7 ) /* not used */
/* Interrupt Enable 1 */
SFRBIT( IEN1 , 0xB8, _IEN17, _IEN16, P0IE, T4IE, T3IE, T2IE, T1IE, DMAIE )
SFR( IP1 , 0xB9 ) /* Interrupt Priority 1 */
SFR( ADCL , 0xBA ) /* ADC Data Low */
SFR( ADCH , 0xBB ) /* ADC Data High */
SFR( RNDL , 0xBC ) /* Random Number Generator Data Low Byte */
SFR( RNDH , 0xBD ) /* Random Number Generator Data High Byte */
SFR( SLEEP , 0xBE ) /* Sleep Mode Control */
SFR( _SFRBF , 0xBF ) /* not used */
/* Interrupt Flag 4 */
SFRBIT( IRCON , 0xC0, STIF, _IRCON6, P0IF, T4IF, T3IF, T2IF, T1IF, DMAIF )
SFR( U0DBUF , 0xC1 ) /* USART 0 Receive/Transmit Data Buffer */
SFR( U0BAUD , 0xC2 ) /* USART 0 Baud Rate Control */
SFR( _SFRC3 , 0xC3 ) /* not in use */
SFR( U0UCR , 0xC4 ) /* USART 0 UART Control */
SFR( U0GCR , 0xC5 ) /* USART 0 Generic Control */
SFR( CLKCON , 0xC6 ) /* Clock Control */
SFR( MEMCTR , 0xC7 ) /* Memory Arbiter Control */
SFR( _SFRC8 , 0xC8 ) /* not in use */
SFR( WDCTL , 0xC9 ) /* Watchdog Timer Control */
SFR( T3CNT , 0xCA ) /* Timer 3 Counter */
SFR( T3CTL , 0xCB ) /* Timer 3 Control */
SFR( T3CCTL0 , 0xCC ) /* Timer 3 Channel 0 Capture/Compare Control */
SFR( T3CC0 , 0xCD ) /* Timer 3 Channel 0 Capture/Compare Value */
SFR( T3CCTL1 , 0xCE ) /* Timer 3 Channel 1 Capture/Compare Control */
SFR( T3CC1 , 0xCF ) /* Timer 3 Channel 1 Capture/Compare Value */
/* Program Status Word */
SFRBIT( PSW , 0xD0, CY, AC, F0, RS1, RS0, OV, F1, P)
SFR( DMAIRQ , 0xD1 ) /* DMA Interrupt Flag */
SFR( DMA1CFGL , 0xD2 ) /* DMA Channel 1-4 Configuration Address Low Byte */
SFR( DMA1CFGH , 0xD3 ) /* DMA Channel 1-4 Configuration Address High Byte */
SFR( DMA0CFGL , 0xD4 ) /* DMA Channel 0 Configuration Address Low Byte */
SFR( DMA0CFGH , 0xD5 ) /* DMA Channel 0 Configuration Address High Byte */
SFR( DMAARM , 0xD6 ) /* DMA Channel Arm */
SFR( DMAREQ , 0xD7 ) /* DMA Channel Start Request and Status */
/* Timers 1/3/4 Interrupt Mask/Flag */
SFRBIT( TIMIF , 0xD8 , _TIMIF7, OVFIM, T4CH1IF, T4CH0IF, T4OVFIF, T3CH1IF, T3CH0IF, T3OVFIF )
SFR( RFD , 0xD9 ) /* RF Data */
SFR( T1CC0L , 0xDA ) /* Timer 1 Channel 0 Capture/Compare Value Low Byte */
SFR( T1CC0H , 0xDB ) /* Timer 1 Channel 0 Capture/Compare Value High Byte */
SFR( T1CC1L , 0xDC ) /* Timer 1 Channel 1 Capture/Compare Value Low Byte */
SFR( T1CC1H , 0xDD ) /* Timer 1 Channel 1 Capture/Compare Value High Byte */
SFR( T1CC2L , 0xDE ) /* Timer 1 Channel 2 Capture/Compare Value Low Byte */
SFR( T1CC2H , 0xDF ) /* Timer 1 Channel 2 Capture/Compare Value High Byte */
SFR( ACC , 0xE0 ) /* Accumulator */
SFR( RFST , 0xE1 ) /* RF Strobe Commands */
SFR( T1CNTL , 0xE2 ) /* Timer 1 Counter Low */
SFR( T1CNTH , 0xE3 ) /* Timer 1 Counter High */
SFR( T1CTL , 0xE4 ) /* Timer 1 Control and Status */
SFR( T1CCTL0 , 0xE5 ) /* Timer 1 Channel 0 Capture/Compare Control */
SFR( T1CCTL1 , 0xE6 ) /* Timer 1 Channel 1 Capture/Compare Control */
SFR( T1CCTL2 , 0xE7 ) /* Timer 1 Channel 2 Capture/Compare Control */
/* Interrupt Flag 5 */
SFRBIT( IRCON2 , 0xE8, _IRCON27, _IRCON26, _IRCON25, WDTIF, P1IF, UTX1IF, UTX0IF, P2IF )
SFR( RFIF , 0xE9 ) /* RF Interrupt Flags */
SFR( T4CNT , 0xEA ) /* Timer 4 Counter */
SFR( T4CTL , 0xEB ) /* Timer 4 Control */
SFR( T4CCTL0 , 0xEC ) /* Timer 4 Channel 0 Capture/Compare Control */
SFR( T4CC0 , 0xED ) /* Timer 4 Channel 0 Capture/Compare Value */
SFR( T4CCTL1 , 0xEE ) /* Timer 4 Channel 1 Capture/Compare Control */
SFR( T4CC1 , 0xEF ) /* Timer 4 Channel 1 Capture/Compare Value */
SFR( B , 0xF0 ) /* B */
SFR( PERCFG , 0xF1 ) /* Peripheral Control */
SFR( ADCCFG , 0xF2 ) /* ADC Input Configuration */
SFR( P0SEL , 0xF3 ) /* Port 0 Function Select */
SFR( P1SEL , 0xF4 ) /* Port 1 Function Select */
SFR( P2SEL , 0xF5 ) /* Port 2 Function Select */
SFR( P1INP , 0xF6 ) /* Port 1 Input Mode */
SFR( P2INP , 0xF7 ) /* Port 2 Input Mode */
/* USART 1 Control and Status */
SFRBIT( U1CSR , 0xF8, U1MODE, U1RE, U1SLAVE, U1FE, U1ERR, U1RX_BYTE, U1TX_BYTE, U1ACTIVE )
SFR( U1DBUF , 0xF9 ) /* USART 1 Receive/Transmit Data Buffer */
SFR( U1BAUD , 0xFA ) /* USART 1 Baud Rate Control */
SFR( U1UCR , 0xFB ) /* USART 1 UART Control */
SFR( U1GCR , 0xFC ) /* USART 1 Generic Control */
SFR( P0DIR , 0xFD ) /* Port 0 Direction */
SFR( P1DIR , 0xFE ) /* Port 1 Direction */
SFR( P2DIR , 0xFF ) /* Port 2 Direction */
/* ------------------------------------------------------------------------------------------------
* SFR Bit Access
* ------------------------------------------------------------------------------------------------
*/
/* P0 */
SBIT( P0_7 , 0x87 ) /* GPIO - Port 0, Input 7 */
SBIT( P0_6 , 0x86 ) /* GPIO - Port 0, Input 6 */
SBIT( P0_5 , 0x85 ) /* GPIO - Port 0, Input 5 */
SBIT( P0_4 , 0x84 ) /* GPIO - Port 0, Input 4 */
SBIT( P0_3 , 0x83 ) /* GPIO - Port 0, Input 3 */
SBIT( P0_2 , 0x82 ) /* GPIO - Port 0, Input 2 */
SBIT( P0_1 , 0x81 ) /* GPIO - Port 0, Input 1 */
SBIT( P0_0 , 0x80 ) /* GPIO - Port 0, Input 0 */
/* TCON */
SBIT( URX1IF , 0x8F ) /* USART1 RX Interrupt Flag */
SBIT( _TCON6 , 0x8E ) /* not used */
SBIT( ADCIF , 0x8D ) /* ADC Interrupt Flag */
SBIT( _TCON4 , 0x8C ) /* not used */
SBIT( URX0IF , 0x8B ) /* USART0 RX Interrupt Flag */
SBIT( _TCON2 , 0x8A ) /* reserved (must always be set to 1) */
SBIT( RFTXRXIF , 0x89 ) /* RF TX/RX Complete Interrupt Flag */
SBIT( _TCON0 , 0x88 ) /* reserved (must always be set to 1) */
/* P1 */
SBIT( P1_7 , 0x97 ) /* GPIO - Port 1, Input 7 */
SBIT( P1_6 , 0x96 ) /* GPIO - Port 1, Input 6 */
SBIT( P1_5 , 0x95 ) /* GPIO - Port 1, Input 5 */
SBIT( P1_4 , 0x94 ) /* GPIO - Port 1, Input 4 */
SBIT( P1_3 , 0x93 ) /* GPIO - Port 1, Input 3 */
SBIT( P1_2 , 0x92 ) /* GPIO - Port 1, Input 2 */
SBIT( P1_1 , 0x91 ) /* GPIO - Port 1, Input 1 */
SBIT( P1_0 , 0x90 ) /* GPIO - Port 1, Input 0 */
/* S0CON */
SBIT( ENCIF_1 , 0x99 ) /* AES Interrupt Flag 1 */
SBIT( ENCIF_0 , 0x98 ) /* AES Interrupt Flag 0 */
/* P2 */
SBIT( _P2_7 , 0xA7 ) /* not used */
SBIT( _P2_6 , 0xA6 ) /* not used */
SBIT( _P2_5 , 0xA5 ) /* not used */
SBIT( P2_4 , 0xA4 ) /* GPIO - Port 2, Input 4 */
SBIT( P2_3 , 0xA3 ) /* GPIO - Port 2, Input 3 */
SBIT( P2_2 , 0xA2 ) /* GPIO - Port 2, Input 2 */
SBIT( P2_1 , 0xA1 ) /* GPIO - Port 2, Input 1 */
SBIT( P2_0 , 0xA0 ) /* GPIO - Port 2, Input 0 */
/* IEN0 */
SBIT( EA , 0xAF ) /* Global Interrupt Enable */
SBIT( _IEN06 , 0xAE ) /* not used */
SBIT( STIE , 0xAD ) /* Sleep Timer Interrupt Enable */
SBIT( ENCIE , 0xAC ) /* AES Encryption/Decryption Interrupt Enable */
SBIT( URX1IE , 0xAB ) /* USART1 RX Interrupt Enable */
SBIT( URX0IE , 0xAA ) /* USART0 RX Interrupt Enable */
SBIT( ADCIE , 0xA9 ) /* ADC Interrupt Enable */
SBIT( RFTXRXIE , 0xA8 ) /* RFRXTXIE
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