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--B1_r[0][0] is cpu:cpu|r[0][0] at LC_X31_Y24_N6
--operation mode is normal

B1_r[0][0]_lut_out = D1_instruction[10] & !D1_instruction[11] & (B1L03) # !D1_instruction[10] & (B1L72);
B1_r[0][0] = DFFEAS(B1_r[0][0]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[0][3] is cpu:cpu|r[0][3] at LC_X31_Y24_N5
--operation mode is normal

B1_r[0][3]_lut_out = B1L24 # !D1_instruction[11] & B1L64 & B1L32;
B1_r[0][3] = DFFEAS(B1_r[0][3]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[1][0] is cpu:cpu|r[1][0] at LC_X31_Y25_N7
--operation mode is normal

B1_r[1][0]_lut_out = D1_instruction[10] & B1L05 & !D1_instruction[11] # !D1_instruction[10] & (B1L94);
B1_r[1][0] = DFFEAS(B1_r[1][0]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[1][3] is cpu:cpu|r[1][3] at LC_X30_Y24_N5
--operation mode is normal

B1_r[1][3]_lut_out = B1L25 # B1L1 & B1L64 & !D1_instruction[11];
B1_r[1][3] = DFFEAS(B1_r[1][3]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[2][0] is cpu:cpu|r[2][0] at LC_X31_Y26_N7
--operation mode is normal

B1_r[2][0]_lut_out = D1_instruction[10] & !D1_instruction[11] & B1L65 # !D1_instruction[10] & (B1L55);
B1_r[2][0] = DFFEAS(B1_r[2][0]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[2][3] is cpu:cpu|r[2][3] at LC_X29_Y24_N6
--operation mode is normal

B1_r[2][3]_lut_out = B1L85 # !D1_instruction[11] & B1L64 & B1L2;
B1_r[2][3] = DFFEAS(B1_r[2][3]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[3][0] is cpu:cpu|r[3][0] at LC_X32_Y25_N6
--operation mode is normal

B1_r[3][0]_lut_out = D1_instruction[10] & B1L26 & (!D1_instruction[11]) # !D1_instruction[10] & (B1L16);
B1_r[3][0] = DFFEAS(B1_r[3][0]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1_r[3][3] is cpu:cpu|r[3][3] at LC_X31_Y24_N4
--operation mode is normal

B1_r[3][3]_lut_out = B1L46 # !D1_instruction[11] & B1L64 & B1L3;
B1_r[3][3] = DFFEAS(B1_r[3][3]_lut_out, GLOBAL(clock), VCC, , B1L011, , , , );


--B1L96 is cpu:cpu|add~188 at LC_X30_Y25_N5
--operation mode is arithmetic

B1L96 = B1L9 $ B1L31;

--B1L07 is cpu:cpu|add~190 at LC_X30_Y25_N5
--operation mode is arithmetic

B1L07_cout_0 = B1L9 # !B1L31;
B1L07 = CARRY(B1L07_cout_0);

--B1L17 is cpu:cpu|add~190COUT1_229 at LC_X30_Y25_N5
--operation mode is arithmetic

B1L17_cout_1 = B1L9 # !B1L31;
B1L17 = CARRY(B1L17_cout_1);


--B1L02 is cpu:cpu|Select~10906 at LC_X30_Y25_N4
--operation mode is normal

B1L02 = D1_instruction[8] & G1_decoder_node[0][0] # !D1_instruction[8] & (B1L96);


--B1L27 is cpu:cpu|add~193 at LC_X30_Y27_N5
--operation mode is arithmetic

B1L27 = B1L31 $ B1L9;

--B1L37 is cpu:cpu|add~195 at LC_X30_Y27_N5
--operation mode is arithmetic

B1L37_cout_0 = B1L31 & B1L9;
B1L37 = CARRY(B1L37_cout_0);

--B1L47 is cpu:cpu|add~195COUT1_231 at LC_X30_Y27_N5
--operation mode is arithmetic

B1L47_cout_1 = B1L31 & B1L9;
B1L47 = CARRY(B1L47_cout_1);


--B1L12 is cpu:cpu|Select~10907 at LC_X30_Y25_N3
--operation mode is normal

B1L12 = D1_instruction[9] & B1L02 # !D1_instruction[9] & (D1_instruction[8] & B1L27);


--B1L22 is cpu:cpu|Select~10908 at LC_X29_Y25_N6
--operation mode is normal

B1L22 = D1_instruction[8] # D1_instruction[9];


--B1L32 is cpu:cpu|Select~10909 at LC_X29_Y26_N9
--operation mode is normal

B1L32 = !D1_instruction[4] & (!D1_instruction[5]);


--B1L42 is cpu:cpu|Select~10910 at LC_X30_Y25_N2
--operation mode is normal

B1L42 = B1L32 & B1L12 # !B1L32 & (B1L22 & B1_r[0][0]);


--C1_data_out[0] is memory:memory|data_out[0] at LC_X29_Y26_N3
--operation mode is normal

C1_data_out[0]_lut_out = B1_mem_read_addr[0] & C1_d[0] # !B1_mem_read_addr[0] & (C1_c[0]);
C1_data_out[0] = DFFEAS(C1_data_out[0]_lut_out, GLOBAL(clock), VCC, , C1L53, C1L4, , , !B1_mem_read_addr[1]);


--B1L52 is cpu:cpu|Select~10911 at LC_X32_Y25_N9
--operation mode is normal

B1L52 = D1_instruction[9] & D1_instruction[0] # !D1_instruction[9] & (C1_data_out[0]);


--B1L041 is cpu:cpu|ram_addr[0]~173 at LC_X32_Y25_N1
--operation mode is normal

B1_flag.10_qfbk = B1_flag.10;
B1L041 = !B1_flag.10_qfbk & !D1_instruction[9];

--B1_flag.10 is cpu:cpu|flag.10 at LC_X32_Y25_N1
--operation mode is normal

B1_flag.10 = DFFEAS(B1L041, GLOBAL(clock), GLOBAL(rst), , B1L551, B1_flag.01, , , VCC);


--B1L62 is cpu:cpu|Select~10912 at LC_X32_Y25_N4
--operation mode is normal

B1L62 = B1L32 & (B1L041 & (B1_r[0][0]) # !B1L041 & B1L52) # !B1L32 & (B1_r[0][0]);


--B1L72 is cpu:cpu|Select~10913 at LC_X31_Y24_N7
--operation mode is normal

B1L72 = D1_instruction[11] & (!D1_instruction[8] & B1L62) # !D1_instruction[11] & B1L42;


--B1L4 is cpu:cpu|Mux~120 at LC_X31_Y25_N8
--operation mode is normal

B1L4 = D1_instruction[5] & (B1_r[2][3] # D1_instruction[4]) # !D1_instruction[5] & B1_r[0][3] & (!D1_instruction[4]);


--B1L5 is cpu:cpu|Mux~121 at LC_X31_Y25_N9
--operation mode is normal

B1L5 = D1_instruction[4] & (B1L4 & B1_r[3][3] # !B1L4 & (B1_r[1][3])) # !D1_instruction[4] & (B1L4);

--B1_data_in[3] is cpu:cpu|data_in[3] at LC_X31_Y25_N9
--operation mode is normal

B1_data_in[3] = DFFEAS(B1L5, GLOBAL(clock), VCC, , B1L19, , , , );


--B1L82 is cpu:cpu|Select~10914 at LC_X31_Y25_N1
--operation mode is normal

B1L82 = B1L5 & D1_instruction[9] & !D1_instruction[8];


--B1L6 is cpu:cpu|Mux~122 at LC_X31_Y27_N0
--operation mode is normal

B1_r[1][1]_qfbk = B1_r[1][1];
B1L6 = D1_instruction[4] & (B1_r[1][1]_qfbk # D1_instruction[5]) # !D1_instruction[4] & B1_r[0][1] & (!D1_instruction[5]);

--B1_r[1][1] is cpu:cpu|r[1][1] at LC_X31_Y27_N0
--operation mode is normal

B1_r[1][1] = DFFEAS(B1L6, GLOBAL(clock), VCC, , B1L221, B1L53, , , VCC);


--B1L7 is cpu:cpu|Mux~123 at LC_X31_Y27_N3
--operation mode is normal

B1_r[3][1]_qfbk = B1_r[3][1];
B1L7 = B1L6 & (B1_r[3][1]_qfbk # !D1_instruction[5]) # !B1L6 & B1_r[2][1] & (D1_instruction[5]);

--B1_r[3][1] is cpu:cpu|r[3][1] at LC_X31_Y27_N3
--operation mode is normal

B1_r[3][1] = DFFEAS(B1L7, GLOBAL(clock), VCC, , B1L531, B1L53, , , VCC);


--B1L92 is cpu:cpu|Select~10915 at LC_X31_Y25_N0
--operation mode is normal

B1L92 = B1L7 & D1_instruction[8];


--B1L03 is cpu:cpu|Select~10916 at LC_X31_Y25_N4
--operation mode is normal

B1L03 = B1L32 & (B1L82 # B1L92) # !B1L32 & B1_r[0][0];


--B1L13 is cpu:cpu|Select~10918 at LC_X31_Y24_N9
--operation mode is normal

B1L13 = D1_instruction[10] & (D1_instruction[11]) # !D1_instruction[10] & (D1_instruction[8] & (D1_instruction[11]) # !D1_instruction[8] & !D1_instruction[9] & !D1_instruction[11]);


--B1L011 is cpu:cpu|r[0][0]~1514 at LC_X31_Y24_N1
--operation mode is normal

B1L011 = rst & (!B1L13);


--B1L8 is cpu:cpu|Mux~124 at LC_X31_Y27_N1
--operation mode is normal

B1L8 = D1_instruction[5] & (D1_instruction[4]) # !D1_instruction[5] & (D1_instruction[4] & B1_r[1][0] # !D1_instruction[4] & (B1_r[0][0]));


--B1L9 is cpu:cpu|Mux~125 at LC_X30_Y27_N2
--operation mode is normal

B1L9 = D1_instruction[5] & (B1L8 & (B1_r[3][0]) # !B1L8 & B1_r[2][0]) # !D1_instruction[5] & (B1L8);

--B1_data_in[0] is cpu:cpu|data_in[0] at LC_X30_Y27_N2
--operation mode is normal

B1_data_in[0] = DFFEAS(B1L9, GLOBAL(clock), VCC, , B1L19, , , , );


--B1L411 is cpu:cpu|r[0][2]~1515 at LC_X29_Y24_N9
--operation mode is normal

B1L411 = D1_instruction[11] & (D1_instruction[9]) # !D1_instruction[11] & !D1_instruction[8] & (D1_instruction[10]);


--C1_data_out[1] is memory:memory|data_out[1] at LC_X29_Y26_N6
--operation mode is normal

C1_data_out[1]_lut_out = B1_mem_read_addr[0] & C1_d[1] # !B1_mem_read_addr[0] & (C1_c[1]);
C1_data_out[1] = DFFEAS(C1_data_out[1]_lut_out, GLOBAL(clock), VCC, , C1L53, C1L6, , , !B1_mem_read_addr[1]);


--L3L1 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~21 at LC_X30_Y24_N6
--operation mode is arithmetic

L3L1 = G1_decoder_node[1][0] $ G1_decoder_node[0][1];

--L3L2 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~23 at LC_X30_Y24_N6
--operation mode is arithmetic

L3L2_cout_0 = G1_decoder_node[1][0] & G1_decoder_node[0][1];
L3L2 = CARRY(L3L2_cout_0);

--L3L3 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~23COUT1 at LC_X30_Y24_N6
--operation mode is arithmetic

L3L3_cout_1 = G1_decoder_node[1][0] & G1_decoder_node[0][1];
L3L3 = CARRY(L3L3_cout_1);


--B1L511 is cpu:cpu|r[0][2]~1516 at LC_X31_Y26_N1
--operation mode is normal

B1L511 = D1_instruction[8] & (D1_instruction[10] # D1_instruction[9]);


--B1L57 is cpu:cpu|add~198 at LC_X30_Y25_N6
--operation mode is arithmetic

B1L57 = B1L7 $ B1L51 $ !B1L07;

--B1L67 is cpu:cpu|add~200 at LC_X30_Y25_N6
--operation mode is arithmetic

B1L67_cout_0 = B1L7 & B1L51 & !B1L07 # !B1L7 & (B1L51 # !B1L07);
B1L67 = CARRY(B1L67_cout_0);

--B1L77 is cpu:cpu|add~200COUT1 at LC_X30_Y25_N6
--operation mode is arithmetic

B1L77_cout_1 = B1L7 & B1L51 & !B1L17 # !B1L7 & (B1L51 # !B1L17);
B1L77 = CARRY(B1L77_cout_1);


--B1L611 is cpu:cpu|r[0][2]~1517 at LC_X29_Y25_N0
--operation mode is normal

B1L611 = D1_instruction[10] # !D1_instruction[8];


--B1L87 is cpu:cpu|add~203 at LC_X30_Y27_N6
--operation mode is arithmetic

B1L87 = B1L7 $ B1L51 $ B1L37;

--B1L97 is cpu:cpu|add~205 at LC_X30_Y27_N6
--operation mode is arithmetic

B1L97_cout_0 = B1L7 & !B1L51 & !B1L37 # !B1L7 & (!B1L37 # !B1L51);
B1L97 = CARRY(B1L97_cout_0);

--B1L08 is cpu:cpu|add~205COUT1 at LC_X30_Y27_N6
--operation mode is arithmetic

B1L08_cout_1 = B1L7 & !B1L51 & !B1L47 # !B1L7 & (!B1L47 # !B1L51);
B1L08 = CARRY(B1L08_cout_1);


--B1L23 is cpu:cpu|Select~10919 at LC_X30_Y27_N3
--operation mode is normal

B1L23 = B1L511 & (B1L611) # !B1L511 & (B1L611 & B1L57 # !B1L611 & (B1L87));


--B1L01 is cpu:cpu|Mux~126 at LC_X29_Y27_N5
--operation mode is normal

B1_r[2][2]_qfbk = B1_r[2][2];
B1L01 = D1_instruction[4] & D1_instruction[5] # !D1_instruction[4] & (D1_instruction[5] & B1_r[2][2]_qfbk # !D1_instruction[5] & (B1_r[0][2]));

--B1_r[2][2] is cpu:cpu|r[2][2] at LC_X29_Y27_N5
--operation mode is normal

B1_r[2][2] = DFFEAS(B1L01, GLOBAL(clock), VCC, , B1L921, B1L93, , , VCC);


--B1L11 is cpu:cpu|Mux~127 at LC_X31_Y27_N2
--operation mode is normal

B1_r[1][2]_qfbk = B1_r[1][2];
B1L11 = D1_instruction[4] & (B1L01 & (B1_r[3][2]) # !B1L01 & B1_r[1][2]_qfbk) # !D1_instruction[4] & B1L01;

--B1_r[1][2] is cpu:cpu|r[1][2] at LC_X31_Y27_N2
--operation mode is normal

B1_r[1][2] = DFFEAS(B1L11, GLOBAL(clock), VCC, , B1L221, B1L93, , , VCC);


--B1L33 is cpu:cpu|Select~10920 at LC_X31_Y26_N9
--operation mode is normal

B1L33 = B1L23 & (B1L11 # !B1L511) # !B1L23 & L3L1 & (B1L511);


--B1L43 is cpu:cpu|Select~10921 at LC_X31_Y26_N8
--operation mode is normal

B1L43 = D1_instruction[11] & (B1L411 # C1_data_out[1]) # !D1_instruction[11] & B1L33 & !B1L411;


--B1L53 is cpu:cpu|Select~10922 at LC_X31_Y26_N5
--operation mode is normal

B1L53 = B1L411 & (B1L43 & D1_instruction[1] # !B1L43 & (B1L9)) # !B1L411 & (B1L43);

--B1_r[0][1] is cpu:cpu|r[0][1] at LC_X31_Y26_N5
--operation mode is normal

B1_r[0][1] = DFFEAS(B1L53, GLOBAL(clock), VCC, , B1L211, , , , );


--B1L121 is cpu:cpu|r[1][1]~1518 at LC_X29_Y27_N6
--operation mode is normal

B1L121 = !D1_instruction[8] & !D1_instruction[10];


--B1L821 is cpu:cpu|r[2][1]~1519 at LC_X29_Y27_N9
--operation mode is normal

B1L821 = B1L121 & (D1_instruction[9] # B1_flag.10 & D1_instruction[11]) # !B1L121 & (!D1_instruction[11]);


--C1_data_out[2] is memory:memory|data_out[2] at LC_X27_Y27_N2
--operation mode is normal

C1_data_out[2]_lut_out = B1_mem_read_addr[0] & (C1_d[2]) # !B1_mem_read_addr[0] & C1_c[2];
C1_data_out[2] = DFFEAS(C1_data_out[2]_lut_out, GLOBAL(clock), VCC, , C1L53, C1L8, , , !B1_mem_read_addr[1]);


--B1L18 is cpu:cpu|add~208 at LC_X30_Y25_N7
--operation mode is arithmetic