B1L18 = B1L11 $ B1L71 $ B1L67;

--B1L28 is cpu:cpu|add~210 at LC_X30_Y25_N7
--operation mode is arithmetic

B1L28_cout_0 = B1L11 & (!B1L67 # !B1L71) # !B1L11 & !B1L71 & !B1L67;
B1L28 = CARRY(B1L28_cout_0);

--B1L38 is cpu:cpu|add~210COUT1_230 at LC_X30_Y25_N7
--operation mode is arithmetic

B1L38_cout_1 = B1L11 & (!B1L77 # !B1L71) # !B1L11 & !B1L71 & !B1L77;
B1L38 = CARRY(B1L38_cout_1);


--L9L1 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~14 at LC_X30_Y24_N1
--operation mode is arithmetic

L9L1 = L3L4 $ G1_decoder_node[2][0];

--L9L2 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~16 at LC_X30_Y24_N1
--operation mode is arithmetic

L9L2_cout_0 = L3L4 & G1_decoder_node[2][0];
L9L2 = CARRY(L9L2_cout_0);

--L9L3 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~16COUT1 at LC_X30_Y24_N1
--operation mode is arithmetic

L9L3_cout_1 = L3L4 & G1_decoder_node[2][0];
L9L3 = CARRY(L9L3_cout_1);


--B1L48 is cpu:cpu|add~213 at LC_X30_Y27_N7
--operation mode is arithmetic

B1L48 = B1L11 $ B1L71 $ !B1L97;

--B1L58 is cpu:cpu|add~215 at LC_X30_Y27_N7
--operation mode is arithmetic

B1L58_cout_0 = B1L11 & (B1L71 # !B1L97) # !B1L11 & B1L71 & !B1L97;
B1L58 = CARRY(B1L58_cout_0);

--B1L68 is cpu:cpu|add~215COUT1_232 at LC_X30_Y27_N7
--operation mode is arithmetic

B1L68_cout_1 = B1L11 & (B1L71 # !B1L08) # !B1L11 & B1L71 & !B1L08;
B1L68 = CARRY(B1L68_cout_1);


--B1L63 is cpu:cpu|Select~10923 at LC_X30_Y27_N4
--operation mode is normal

B1L63 = B1L511 & (L9L1 # B1L611) # !B1L511 & B1L48 & (!B1L611);


--B1L73 is cpu:cpu|Select~10924 at LC_X30_Y27_N0
--operation mode is normal

B1L73 = B1L63 & (B1L5 # !B1L611) # !B1L63 & (B1L18 & B1L611);


--B1L83 is cpu:cpu|Select~10925 at LC_X30_Y27_N9
--operation mode is normal

B1L83 = B1L411 & (D1_instruction[11]) # !B1L411 & (D1_instruction[11] & (C1_data_out[2]) # !D1_instruction[11] & B1L73);


--B1L93 is cpu:cpu|Select~10926 at LC_X30_Y27_N1
--operation mode is normal

B1L93 = B1L411 & (B1L83 & (D1_instruction[2]) # !B1L83 & B1L7) # !B1L411 & (B1L83);

--B1_r[0][2] is cpu:cpu|r[0][2] at LC_X30_Y27_N1
--operation mode is normal

B1_r[0][2] = DFFEAS(B1L93, GLOBAL(clock), VCC, , B1L211, , , , );


--B1L04 is cpu:cpu|Select~10927 at LC_X29_Y24_N4
--operation mode is normal

B1L04 = D1_instruction[8] & (!D1_instruction[11]) # !D1_instruction[8] & (D1_instruction[10] & (!D1_instruction[11]) # !D1_instruction[10] & D1_instruction[9]);


--C1_data_out[3] is memory:memory|data_out[3] at LC_X29_Y26_N4
--operation mode is normal

C1_data_out[3]_lut_out = B1_mem_read_addr[0] & (C1_d[3]) # !B1_mem_read_addr[0] & C1_c[3];
C1_data_out[3] = DFFEAS(C1_data_out[3]_lut_out, GLOBAL(clock), VCC, , C1L53, C1L01, , , !B1_mem_read_addr[1]);


--B1L14 is cpu:cpu|Select~10928 at LC_X29_Y26_N5
--operation mode is normal

B1L14 = B1L32 & (B1_flag.10 & C1_data_out[3] # !B1_flag.10 & (B1_r[0][3])) # !B1L32 & (B1_r[0][3]);


--B1L551 is cpu:cpu|reduce_or~18 at LC_X29_Y24_N1
--operation mode is normal

B1L551 = !D1_instruction[10] & (!D1_instruction[9] & D1_instruction[11]);


--B1L24 is cpu:cpu|Select~10929 at LC_X31_Y24_N0
--operation mode is normal

B1L24 = B1L56 # !D1_instruction[8] & B1L14 & B1L551;


--B1L141 is cpu:cpu|ram_addr[0]~174 at LC_X29_Y25_N1
--operation mode is normal

B1L141 = D1_instruction[8] & D1_instruction[9];


--L9L4 is cpu:cpu|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|mpar_add:sub_par_add|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~19 at LC_X30_Y24_N2
--operation mode is normal

L9L4 = L3L7 $ (L9L2 $ L6L1);


--B1L78 is cpu:cpu|add~218 at LC_X30_Y27_N8
--operation mode is normal

B1L78 = B1L5 $ B1L58 $ B1L91;


--B1L34 is cpu:cpu|Select~10930 at LC_X30_Y24_N4
--operation mode is normal

B1L34 = D1_instruction[9] & (L9L4) # !D1_instruction[9] & (B1L78);


--B1L88 is cpu:cpu|add~223 at LC_X30_Y25_N8
--operation mode is normal

B1L88 = B1L5 $ (B1L28 $ !B1L91);


--B1L44 is cpu:cpu|Select~10931 at LC_X30_Y24_N0
--operation mode is normal

B1L44 = D1_instruction[8] & (B1L34) # !D1_instruction[8] & D1_instruction[9] & B1L88;


--B1L54 is cpu:cpu|Select~10932 at LC_X30_Y24_N3
--operation mode is normal

B1L54 = D1_instruction[10] & B1L9 & B1L141 # !D1_instruction[10] & (B1L44);


--B1L64 is cpu:cpu|Select~10933 at LC_X30_Y24_N9
--operation mode is normal

B1L64 = B1L54 # D1_instruction[10] & B1L11 & !D1_instruction[8];


--B1L1 is cpu:cpu|Decoder~172 at LC_X29_Y25_N9
--operation mode is normal

B1L1 = D1_instruction[4] & (!D1_instruction[5]);


--B1L74 is cpu:cpu|Select~10935 at LC_X31_Y25_N5
--operation mode is normal

B1L74 = B1L1 & (B1L12) # !B1L1 & B1_r[1][0] & (B1L22);


--B1L84 is cpu:cpu|Select~10936 at LC_X32_Y25_N2
--operation mode is normal

B1L84 = B1L1 & (B1L041 & B1_r[1][0] # !B1L041 & (B1L52)) # !B1L1 & B1_r[1][0];


--B1L94 is cpu:cpu|Select~10937 at LC_X31_Y25_N6
--operation mode is normal

B1L94 = D1_instruction[11] & !D1_instruction[8] & B1L84 # !D1_instruction[11] & (B1L74);


--B1L05 is cpu:cpu|Select~10938 at LC_X31_Y25_N2
--operation mode is normal

B1L05 = B1L1 & (B1L82 # B1L92) # !B1L1 & (B1_r[1][0]);


--B1L15 is cpu:cpu|Select~10940 at LC_X29_Y25_N8
--operation mode is normal

B1L15 = B1_flag.10 & (B1L1 & C1_data_out[3] # !B1L1 & (B1_r[1][3])) # !B1_flag.10 & (B1_r[1][3]);


--B1L25 is cpu:cpu|Select~10941 at LC_X29_Y25_N4
--operation mode is normal

B1L25 = B1L66 # B1L15 & B1L551 & !D1_instruction[8];


--B1L2 is cpu:cpu|Decoder~173 at LC_X31_Y26_N2
--operation mode is normal

B1L2 = D1_instruction[5] & (!D1_instruction[4]);


--B1L35 is cpu:cpu|Select~10943 at LC_X31_Y26_N4
--operation mode is normal

B1L35 = B1L2 & (B1L12) # !B1L2 & B1L22 & (B1_r[2][0]);


--B1L45 is cpu:cpu|Select~10944 at LC_X31_Y26_N0
--operation mode is normal

B1L45 = B1L2 & (B1L041 & (B1_r[2][0]) # !B1L041 & B1L52) # !B1L2 & (B1_r[2][0]);


--B1L55 is cpu:cpu|Select~10945 at LC_X31_Y26_N6
--operation mode is normal

B1L55 = D1_instruction[11] & !D1_instruction[8] & B1L45 # !D1_instruction[11] & (B1L35);


--B1L65 is cpu:cpu|Select~10946 at LC_X31_Y26_N3
--operation mode is normal

B1L65 = B1L2 & (B1L92 # B1L82) # !B1L2 & (B1_r[2][0]);


--B1L75 is cpu:cpu|Select~10948 at LC_X29_Y26_N8
--operation mode is normal

B1L75 = B1_flag.10 & (B1L2 & (C1_data_out[3]) # !B1L2 & B1_r[2][3]) # !B1_flag.10 & B1_r[2][3];


--B1L85 is cpu:cpu|Select~10949 at LC_X29_Y24_N0
--operation mode is normal

B1L85 = B1L76 # !D1_instruction[8] & B1L551 & B1L75;


--B1L3 is cpu:cpu|Decoder~174 at LC_X32_Y25_N3
--operation mode is normal

B1L3 = D1_instruction[4] & D1_instruction[5];


--B1L95 is cpu:cpu|Select~10951 at LC_X32_Y25_N0
--operation mode is normal

B1L95 = B1L3 & (B1L12) # !B1L3 & B1_r[3][0] & (B1L22);


--B1L06 is cpu:cpu|Select~10952 at LC_X32_Y25_N8
--operation mode is normal

B1L06 = B1L3 & (B1L041 & B1_r[3][0] # !B1L041 & (B1L52)) # !B1L3 & B1_r[3][0];


--B1L16 is cpu:cpu|Select~10953 at LC_X32_Y25_N7
--operation mode is normal

B1L16 = D1_instruction[11] & B1L06 & (!D1_instruction[8]) # !D1_instruction[11] & (B1L95);


--B1L26 is cpu:cpu|Select~10954 at LC_X32_Y25_N5
--operation mode is normal

B1L26 = B1L3 & (B1L82 # B1L92) # !B1L3 & B1_r[3][0];


--B1L36 is cpu:cpu|Select~10956 at LC_X29_Y26_N7
--operation mode is normal

B1L36 = B1L3 & (B1_flag.10 & C1_data_out[3] # !B1_flag.10 & (B1_r[3][3])) # !B1L3 & (B1_r[3][3]);


--B1L46 is cpu:cpu|Select~10957 at LC_X31_Y24_N3
--operation mode is normal

B1L46 = B1L86 # !D1_instruction[8] & B1L36 & B1L551;


--B1_ram_addr[0] is cpu:cpu|ram_addr[0] at LC_X24_Y24_N0
--operation mode is arithmetic

B1_ram_addr[0]_lut_out = !B1_ram_addr[0];
B1_ram_addr[0] = DFFEAS(B1_ram_addr[0]_lut_out, GLOBAL(clock), GLOBAL(rst), , B1L441, , , , );

--B1L241 is cpu:cpu|ram_addr[0]~176 at LC_X24_Y24_N0
--operation mode is arithmetic

B1L241_cout_0 = B1_ram_addr[0];
B1L241 = CARRY(B1L241_cout_0);

--B1L341 is cpu:cpu|ram_addr[0]~176COUT1_197 at LC_X24_Y24_N0
--operation mode is arithmetic

B1L341_cout_1 = B1_ram_addr[0];
B1L341 = CARRY(B1L341_cout_1);


--B1_ram_addr[1] is cpu:cpu|ram_addr[1] at LC_X24_Y24_N1
--operation mode is arithmetic

B1_ram_addr[1]_lut_out = B1_ram_addr[1] $ B1L241;
B1_ram_addr[1] = DFFEAS(B1_ram_addr[1]_lut_out, GLOBAL(clock), GLOBAL(rst), , B1L441, , , , );

--B1L641 is cpu:cpu|ram_addr[1]~180 at LC_X24_Y24_N1
--operation mode is arithmetic

B1L641_cout_0 = !B1L241 # !B1_ram_addr[1];
B1L641 = CARRY(B1L641_cout_0);

--B1L741 is cpu:cpu|ram_addr[1]~180COUT1 at LC_X24_Y24_N1
--operation mode is arithmetic

B1L741_cout_1 = !B1L341 # !B1_ram_addr[1];
B1L741 = CARRY(B1L741_cout_1);


--B1_ram_addr[2] is cpu:cpu|ram_addr[2] at LC_X24_Y24_N2
--operation mode is arithmetic

B1_ram_addr[2]_lut_out = B1_ram_addr[2] $ (!B1L641);
B1_ram_addr[2] = DFFEAS(B1_ram_addr[2]_lut_out, GLOBAL(clock), GLOBAL(rst), , B1L441, , , , );

--B1L941 is cpu:cpu|ram_addr[2]~184 at LC_X24_Y24_N2
--operation mode is arithmetic

B1L941_cout_0 = B1_ram_addr[2] & (!B1L641);
B1L941 = CARRY(B1L941_cout_0);

--B1L051 is cpu:cpu|ram_addr[2]~184COUT1_198 at LC_X24_Y24_N2
--operation mode is arithmetic

B1L051_cout_1 = B1_ram_addr[2] & (!B1L741);
B1L051 = CARRY(B1L051_cout_1);


--B1_ram_addr[3] is cpu:cpu|ram_addr[3] at LC_X24_Y24_N3
--operation mode is arithmetic

B1_ram_addr[3]_lut_out = B1_ram_addr[3] $ (B1L941);
B1_ram_addr[3] = DFFEAS(B1_ram_addr[3]_lut_out, GLOBAL(clock), GLOBAL(rst), , B1L441, , , , );

--B1L251 is cpu:cpu|ram_addr[3]~188 at LC_X24_Y24_N3
--operation mode is arithmetic

B1L251_cout_0 = !B1L941 # !B1_ram_addr[3];
B1L251 = CARRY(B1L251_cout_0);

--B1L351 is cpu:cpu|ram_addr[3]~188COUT1_199 at LC_X24_Y24_N3
--operation mode is arithmetic

B1L351_cout_1 = !B1L051 # !B1_ram_addr[3];
B1L351 = CARRY(B1L351_cout_1);


--D1L11 is prog_ram:prog_ram|reduce_or~405 at LC_X25_Y24_N6
--operation mode is normal

D1L11 = !B1_ram_addr[0] & (B1_ram_addr[2] & B1_ram_addr[3] & B1_ram_addr[1] # !B1_ram_addr[2] & (B1_ram_addr[3] $ B1_ram_addr[1]));


--B1_ram_addr[4] is cpu:cpu|ram_addr[4] at LC_X24_Y24_N4
--operation mode is normal

B1_ram_addr[4]_lut_out = B1L251 $ !B1_ram_addr[4];
B1_ram_addr[4] = DFFEAS(B1_ram_addr[4]_lut_out, GLOBAL(clock), GLOBAL(rst), , B1L441, , , , );


--D1L21 is prog_ram:prog_ram|reduce_or~406 at LC_X24_Y24_N9
--operation mode is normal

D1L21 = !B1_ram_addr[1] & !B1_ram_addr[3] & !B1_ram_addr[2];


--D1L31 is prog_ram:prog_ram|reduce_or~407 at LC_X25_Y24_N8
--operation mode is normal

D1L31 = B1_ram_addr[4] & (!D1L21 # !B1_ram_addr[0]) # !B1_ram_addr[4] & (D1L11);


--D1L41 is prog_ram:prog_ram|reduce_or~408 at LC_X24_Y24_N6
--operation mode is normal

D1L41 = B1_ram_addr[3] # B1_ram_addr[2] # B1_ram_addr[0] & B1_ram_addr[1];


--D1L51 is prog_ram:prog_ram|reduce_or~409 at LC_X24_Y24_N7
--operation mode is normal

D1L51 = B1_ram_addr[4] & (D1L41);


--D1_instruction[0] is prog_ram:prog_ram|instruction[0] at LC_X30_Y26_N1
--operation mode is normal

D1_instruction[0] = GLOBAL(D1L51) & (D1_instruction[0]) # !GLOBAL(D1L51) & D1L31;

--B1_mem_read_addr[0] is cpu:cpu|mem_read_addr[0] at LC_X30_Y26_N1
--operation mode is normal

B1_mem_read_addr[0] = DFFEAS(D1_instruction[0], GLOBAL(clock), VCC, , B1L001, , , , );


--D1L61 is prog_ram:prog_ram|reduce_or~410 at LC_X25_Y24_N3
--operation mode is normal

D1L61 = !B1_ram_addr[0] & !B1_ram_addr[2] & !B1_ram_addr[3] & !B1_ram_addr[1];