?? sdi.c
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#include <stdio.h>
#include <string.h>
#include "def.h"
#include "option.h"
#include "2440addr.h"
#include "2440lib.h"
#include "sdi.h"
#define INICLK 300000
#define SDCLK 24000000 //PCLK=49.392MHz
#define MMCCLK 15000000 //PCLK=49.392MHz
#define POL 0
#define INT 1
#define DMA 2
int CMD13(void); // Send card status
int CMD9(void);
unsigned int *Tx_buffer; //128[word]*16[blk]=8192[byte]
unsigned int *Rx_buffer; //128[word]*16[blk]=8192[byte]
volatile unsigned int rd_cnt;
volatile unsigned int wt_cnt;
volatile unsigned int block;
volatile unsigned int TR_end=0;
int Wide=0; // 0:1bit, 1:4bit
int MMC=0; // 0:SD , 1:MMC
int Maker_ID;
char Product_Name[7];
int Serial_Num;
volatile int RCA;
void Test_SDI(void)
{
U32 save_rGPEUP, save_rGPECON;
RCA=0;
MMC=0;
block=3072; //3072Blocks=1.5MByte, ((2Block=1024Byte)*1024Block=1MByte)
save_rGPEUP=rGPEUP;
save_rGPECON=rGPECON;
rGPEUP = 0xf83f; // SDCMD, SDDAT[3:0] => PU En.
rGPECON = 0xaaaaaaaa; //SDCMD, SDDAT[3:0]
Uart_Printf("\nSDI Card Write and Read Test\n");
if(!SD_card_init())
return;
TR_Buf_new();
Wt_Block();
Rd_Block();
View_Rx_buf();
if(MMC)
TR_Buf_new();
if(MMC)
{
rSDICON |=(1<<5); // YH 0519, MMC Type SDCLK
Wt_Stream();
Rd_Stream();
View_Rx_buf();
}
Card_sel_desel(0); // Card deselect
if(!CMD9())
Uart_Printf("Get CSD fail!!!\n");
rSDIDCON=0;//tark???
rSDICSTA=0xffff;
rGPEUP=save_rGPEUP;
rGPECON=save_rGPECON;
}
void TR_Buf_new(void)
{
//-- Tx & Rx Buffer initialize
int i, j;
Tx_buffer=(unsigned int *)0x31000000;
j=0;
for(i=0;i<2048;i++) //128[word]*16[blk]=8192[byte]
*(Tx_buffer+i)=i+j;
Flush_Rx_buf();
}
void Flush_Rx_buf(void)
{
//-- Flushing Rx buffer
int i;
Rx_buffer=(unsigned int *)0x31800000;
for(i=0;i<2048;i++) //128[word]*16[blk]=8192[byte]
*(Rx_buffer+i)=0;
Uart_Printf("End Rx buffer flush\n");
}
void View_Rx_buf()
{
//-- Display Rx buffer
int i,error=0;
Tx_buffer=(unsigned int *)0x31000000;
Rx_buffer=(unsigned int *)0x31800000;
Uart_Printf("Check Rx data\n");
for(i=0;i<128*block;i++)
{
if(Rx_buffer[i] != Tx_buffer[i])
{
Uart_Printf("\nTx/Rx error\n");
Uart_Printf("%d:Tx-0x%08x, Rx-0x%08x\n",i,Tx_buffer[i], Rx_buffer[i]);
error=1;
break;
}
//Uart_Printf(".");
}
if(!error)
{
Uart_Printf("\nThe Tx_buffer is same to Rx_buffer!\n");
Uart_Printf("SD CARD Write and Read test is OK!\n");
}
}
void View_Tx_buf(void)
{
}
int SD_card_init(void)
{
//-- SD controller & card initialize
int i;
/* Important notice for MMC test condition */
/* Cmd & Data lines must be enabled by pull up resister */
rSDIPRE=PCLK/(INICLK)-1; // 400KHz
Uart_Printf("Init. Frequency is %dHz\n",(PCLK/(rSDIPRE+1)));
rSDICON=(1<<4)|1; // Type B, clk enable
rSDIFSTA=rSDIFSTA|(1<<16); //YH 040223 FIFO reset
rSDIBSIZE=0x200; // 512byte(128word)
rSDIDTIMER=0x7fffff; // Set timeout count
for(i=0;i<0x1000;i++); // Wait 74SDCLK for MMC card
CMD0();
Uart_Printf("In idle\n");
//-- Check MMC card OCR
if(Chk_MMC_OCR())
{
Uart_Printf("In MMC ready\n");
MMC=1;
goto RECMD2;
}
Uart_Printf("MMC check end!!\n");
//-- Check SD card OCR
if(Chk_SD_OCR())
Uart_Printf("In SD ready\n");
else
{
Uart_Printf("Initialize fail\nNo Card assertion\n");
return 0;
}
RECMD2:
//-- Check attaced cards, it makes card identification state
rSDICARG=0x0; // CMD2(stuff bit)
rSDICCON=(0x1<<10)|(0x1<<9)|(0x1<<8)|0x42; //lng_resp, wait_resp, start, CMD2
//-- Check end of CMD2
if(!Chk_CMDend(2, 1))
goto RECMD2;
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
Uart_Printf("End id\n");
RECMD3:
//--Send RCA
rSDICARG=MMC<<16; // CMD3(MMC:Set RCA, SD:Ask RCA-->SBZ)
rSDICCON=(0x1<<9)|(0x1<<8)|0x43; // sht_resp, wait_resp, start, CMD3
//-- Check end of CMD3
if(!Chk_CMDend(3, 1))
goto RECMD3;
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
//--Publish RCA
if(MMC) {
RCA=1;
rSDIPRE=(PCLK/MMCCLK)-1;
Uart_Printf("MMC Frequency is %dHz\n",(PCLK/(rSDIPRE+1)));
}
else
{
RCA=( rSDIRSP0 & 0xffff0000 )>>16;
Uart_Printf("RCA=0x%x\n",RCA);
rSDIPRE=PCLK/(SDCLK)-1; // Normal clock=25MHz
Uart_Printf("SD Frequency is %dHz\n",(PCLK/(rSDIPRE+1)));
} //--State(stand-by) check
if( rSDIRSP0 & 0x1e00!=0x600 ) // CURRENT_STATE check
goto RECMD3;
Uart_Printf("In stand-by\n");
Card_sel_desel(1); // Select
if(!MMC)
Set_4bit_bus();
else
Set_1bit_bus();
return 1;
}
void Card_sel_desel(char sel_desel)
{
//-- Card select or deselect
if(sel_desel)
{
RECMDS7:
rSDICARG=RCA<<16; // CMD7(RCA,stuff bit)
rSDICCON= (0x1<<9)|(0x1<<8)|0x47; // sht_resp, wait_resp, start, CMD7
//-- Check end of CMD7
if(!Chk_CMDend(7, 1))
goto RECMDS7;
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
//--State(transfer) check
if( rSDIRSP0 & 0x1e00!=0x800 )
goto RECMDS7;
}
else
{
RECMDD7:
rSDICARG=0<<16; //CMD7(RCA,stuff bit)
rSDICCON=(0x1<<8)|0x47; //no_resp, start, CMD7
//-- Check end of CMD7
if(!Chk_CMDend(7, 0))
goto RECMDD7;
rSDICSTA=0x800; // Clear cmd_end(no rsp)
}
}
void __irq Rd_Int(void)
{
U32 i,status;
status=rSDIFSTA;
if( (status&0x200) == 0x200 ) // Check Last interrupt?
{
for(i=(status & 0x7f)/4;i>0;i--)
{
*Rx_buffer++=rSDIDAT;
rd_cnt++;
}
rSDIFSTA=rSDIFSTA&0x200; //Clear Rx FIFO Last data Ready, YH 040221
}
else if( (status&0x80) == 0x80 ) // Check Half interrupt?
{
for(i=0;i<8;i++)
{
*Rx_buffer++=rSDIDAT;
rd_cnt++;
}
}
ClearPending(BIT_SDI);
}
void __irq Wt_Int(void)
{
ClearPending(BIT_SDI);
rSDIDAT=*Tx_buffer++;
wt_cnt++;
if(wt_cnt==128*block)
{
rINTMSK |= BIT_SDI;
rSDIDAT=*Tx_buffer;
TR_end=1;
}
}
void __irq DMA_end(void)
{
ClearPending(BIT_DMA0);
TR_end=1;
}
void Rd_Block(void)
{
U32 mode;
int status;
rd_cnt=0;
Uart_Printf("Block read test[ Polling read ]\n");
mode = 0 ;
rSDIFSTA=rSDIFSTA|(1<<16); // FIFO reset
if(mode!=2)
rSDIDCON=(2<<22)|(1<<19)|(1<<17)|(Wide<<16)|(1<<14)|(2<<12)|(block<<0); //YH 040220
rSDICARG=0x0; // CMD17/18(addr)
RERDCMD:
switch(mode)
{
case POL:
if(block<2) // SINGLE_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17
if(!Chk_CMDend(17, 1)) //-- Check end of CMD17
goto RERDCMD;
}
else // MULTI_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x52; // sht_resp, wait_resp, dat, start, CMD18
if(!Chk_CMDend(18, 1)) //-- Check end of CMD18
goto RERDCMD;
}
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
while(rd_cnt<128*block) // 512*block bytes
{
if((rSDIDSTA&0x20)==0x20) // Check timeout
{
rSDIDSTA=(0x1<<0x5); // Clear timeout flag
break;
}
status=rSDIFSTA;
if((status&0x1000)==0x1000) // Is Rx data?
{
*Rx_buffer++=rSDIDAT;
rd_cnt++;
}
}
break;
case INT:
pISR_SDI=(unsigned)Rd_Int;
rINTMSK = ~(BIT_SDI);
rSDIIMSK=5; // Last & Rx FIFO half int.
if(block<2) // SINGLE_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17
if(!Chk_CMDend(17, 1)) //-- Check end of CMD17
goto RERDCMD;
}
else // MULTI_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x52; // sht_resp, wait_resp, dat, start, CMD18
if(!Chk_CMDend(18, 1)) //-- Check end of CMD18
goto RERDCMD;
}
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
while(rd_cnt<128*block);
rINTMSK |= (BIT_SDI);
rSDIIMSK=0; // All mask
break;
case DMA:
pISR_DMA0=(unsigned)DMA_end;
rINTMSK = ~(BIT_DMA0);
rSDIDCON=rSDIDCON|(1<<24); //YH 040227, Burst4 Enable
rDISRC0=(int)(SDIDAT); // SDIDAT
rDISRCC0=(1<<1)+(1<<0); // APB, fix
rDIDST0=(U32)(Rx_buffer); // Rx_buffer
rDIDSTC0=(0<<1)+(0<<0); // AHB, inc
rDCON0=(1<<31)+(0<<30)+(1<<29)+(0<<28)+(0<<27)+(2<<24)+(1<<23)+(1<<22)+(2<<20)+128*block;
rDMASKTRIG0=(0<<2)+(1<<1)+0; //no-stop, DMA2 channel on, no-sw trigger
rSDIDCON=(2<<22)|(1<<19)|(1<<17)|(Wide<<16)|(1<<15)|(1<<14)|(2<<12)|(block<<0);
if(block<2) // SINGLE_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x51; // sht_resp, wait_resp, dat, start, CMD17
if(!Chk_CMDend(17, 1)) //-- Check end of CMD17
goto RERDCMD;
}
else // MULTI_READ
{
rSDICCON=(0x1<<9)|(0x1<<8)|0x52; // sht_resp, wait_resp, dat, start, CMD18
if(!Chk_CMDend(18, 1)) //-- Check end of CMD18
goto RERDCMD;
}
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
while(!TR_end);
//Uart_Printf("rSDIFSTA=0x%x\n",rSDIFSTA);
rINTMSK |= (BIT_DMA0);
TR_end=0;
rDMASKTRIG0=(1<<2); //DMA0 stop
break;
default:
break;
}
//-- Check end of DATA
if(!Chk_DATend())
Uart_Printf("dat error\n");
rSDIDCON=rSDIDCON&~(7<<12);
rSDIFSTA=rSDIFSTA&0x200; //Clear Rx FIFO Last data Ready, YH 040221
rSDIDSTA=0x10; // Clear data Tx/Rx end detect
if(block>1)
{
RERCMD12:
//--Stop cmd(CMD12)
rSDICARG=0x0; //CMD12(stuff bit)
rSDICCON=(0x1<<9)|(0x1<<8)|0x4c;//sht_resp, wait_resp, start, CMD12
//-- Check end of CMD12
if(!Chk_CMDend(12, 1))
goto RERCMD12;
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
}
}
void Rd_Stream(void) // only for MMC, 3blk read
{
int status, rd_cnt=0;
if(MMC!=1)
{
Uart_Printf("Stream read command supports only MMC!\n");
return;
}
Uart_Printf("\n[Stream read test]\n");
RECMD11:
rSDIDCON=(2<<22)|(1<<19)|(0<<17)|(0<<16)|(1<<14)|(2<<12);
rSDICARG=0x0; // CMD11(addr)
rSDICCON=(0x1<<9)|(0x1<<8)|0x4b; //sht_resp, wait_resp, dat, start, CMD11
while(rd_cnt<128*block)
{
if( (rSDIDSTA&0x20) == 0x20 )
{
Uart_Printf("Rread timeout error");
return ;
}
status=rSDIFSTA;
if((status&0x1000)==0x1000)
{
//*Rx_buffer++=rSDIDAT;
//rd_cnt++;
Rx_buffer[rd_cnt++]=rSDIDAT;
}
}
//-- Check end of CMD11
if(!Chk_CMDend(11, 1))
goto RECMD11;
rSDICSTA=0xa00; // Clear cmd_end(with rsp)
//-- Check end of DATA
rSDIDCON=(2<<22)|(1<<19)|(0<<17)|(0<<16); //YH 040220
rSDIDCON=rSDIDCON&~(7<<12); //YH 040220, no operation, data ready
while( rSDIDSTA&0x3 !=0x0 );
if(rSDIDSTA!=0)
Uart_Printf("rSDIDSTA=0x%x\n", rSDIDSTA);
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