#include "at91_init.h"/* the system timer counter */unsigned long sys_timer_count;extern void AT91_IRQHandler(void);#define __arch_putb(v,a)	(*(volatile unsigned char *)(a) = (v))#define __arch_putl(v,a)	(*(volatile unsigned int  *)(a) = (v))/*extern struct irqdesc irq_desc[];*/ /* Internal Sources */#define LevelSensitive              (0<<5)#define EdgeTriggered               (1<<5) /* External Sources */#define LowLevel                    (0<<5)#define NegativeEdge                (1<<5)#define HighLevel                   (2<<5)#define PositiveEdge                (3<<5)static unsigned char eb01_irq_prtable[32] = {        7 << 5, /* FIQ */        0 << 5, /* SWIRQ */        0 << 5, /* US0IRQ */        0 << 5, /* US1IRQ */        1 << 5, /* TC0IRQ */        1 << 5, /* TC1IRQ */        1 << 5, /* TC2IRQ */        0 << 5, /* WDIRQ */        0 << 5, /* PIOAIRQ */        0 << 5, /* reserved */        0 << 5, /* reserved */        0 << 5, /* reserved */        0 << 5, /* reserved */        0 << 5, /* reserved */        0 << 5, /* reserved */        0 << 5, /* reserved */        1 << 5, /* IRQ0 */	0 << 5, /* IRQ1 */        0 << 5, /* IRQ2 */};static unsigned char eb01_irq_type[32] = {        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,	/* IRQ0 = neg. edge */        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,        EdgeTriggered,};/*ARMword fix_int(ARMword val){	ARMword ret = 0;	if (val & (1 << 2))		ret |= URXINT;	if (val & (1 << 5))		ret |= TC1OI;	if (val & (1 << 6))		ret |= TC2OI;	return(ret);}*/void at91_mask_irq(unsigned int irq){	unsigned long mask = 1 << (irq);	__arch_putl(mask, AIC_IDCR);}	void at91_unmask_irq(unsigned int irq){	unsigned long mask = 1 << (irq);	__arch_putl(mask, AIC_IECR);}void at91_mask_ack_irq(unsigned int irq){	at91_mask_irq(irq);        __arch_putl(0, AIC_EOICR);     /* value=don't care */}#define IRQ_VEC		0x18#define IRQ_ADDR	0x38void install_irqhandler(void){  unsigned int * irqaddr = (unsigned int *) IRQ_ADDR;  unsigned int * irqvec = (unsigned int *) IRQ_VEC;   unsigned int vec, oldvec;  *irqaddr = (unsigned int) AT91_IRQHandler;    vec = ((unsigned int) irqaddr  - (unsigned int)irqvec - 0x08) | 0xe59ff000;    oldvec = *irqvec;  *irqvec = vec;			}void init_timer(void){        register volatile struct at91_timers* tt = (struct at91_timers*) (AT91_TC_BASE);        register volatile struct at91_timer_channel* tc = &tt->chans[KERNEL_TIMER].ch;        unsigned long v;        /* chy 2002-12-12, init sys_timer_count */	sys_timer_count=0;	/* enable Kernel timer  defined in at91_init.h*/	/* chy 2002-12-12, seems no use??? */	HW_AT91_TIMER_INIT(KERNEL_TIMER)        /* No SYNC */        tt->bcr = 0;        /* program NO signal on XC1 */        v = tt->bmr;	v &= ~TCNXCNS(KERNEL_TIMER,3);	v |= TCNXCNS(KERNEL_TIMER,1);        tt->bmr = v;        tc->ccr = 2;  /* disable the channel */        /* select ACLK/128 as inupt frequency for TC1 and enable CPCTRG */        tc->cmr = 3 | (1 << 14);	        tc->idr = ~0ul;  /* disable all interrupt */	tc->rc = ((ARM_CLK/128)/HZ - 1);   /* load the count limit into the CR register */	tc->ier = TC_CPCS;  /* enable CPCS interrupt */	/* enable the channel */	tc->ccr = TC_SWTRG|TC_CLKEN;		/* chy 2002-12-12 no use        gettimeoffset = atmel_gettimeoffset;		timer_irq.handler = atmel_timer_interrupt;        setup_arm_irq(KERNEL_TIMER_IRQ_NUM, &timer_irq);        */	at91_mask_ack_irq(KERNEL_TIMER_IRQ_NUM);	at91_unmask_irq(KERNEL_TIMER_IRQ_NUM);}void atmel_timer_interrupt(void){	struct at91_timers* tt = (struct trio_timers*) (AT91_TC_BASE);	volatile struct  at91_timer_channel* tc = &tt->chans[KERNEL_TIMER].ch;	int tmp;		unsigned long v = tc->sr;        sys_timer_count++;        /* end of timer interrupts */	at91_unmask_irq(KERNEL_TIMER_IRQ_NUM);	__arch_putl(KERNEL_TIMER_IRQ_NUM,AIC_EOICR);}void at91_init_aic(){        int irqno;	/* Disable all interrupts */	__arch_putl(0xFFFFFFFF, AIC_IDCR);        /* Clear all interrupts	*/        __arch_putl(0xFFFFFFFF, AIC_ICCR);        	for ( irqno = 0 ; irqno < 32 ; irqno++ )	{	       __arch_putl(irqno, AIC_EOICR);	}        for ( irqno = 0 ; irqno < 32 ; irqno++ )        {               __arch_putl((eb01_irq_prtable[irqno] >> 5) | eb01_irq_type[irqno],AIC_SMR(irqno));														}}														 void init_IRQ(void){  at91_init_aic();  install_irqhandler();}void init_console(void){ int i; i=0;}void do_IRQ(void){   atmel_timer_interrupt();}void init_kernel(void){   init_IRQ();   init_console();   init_timer();}