/*****************************************************************************
 *   wdt.c:  Watchdog C file for NXP LPC2xxx Family Microprocessors
 *
 *   Copyright(C) 2006, NXP Semiconductor
 *   All rights reserved.
 *
 *   History
 *   2006.07.20  ver 1.00    Prelimnary version, first Release
 *
*****************************************************************************/
#include "LPC288x.h"                        /* LPC2xxx definitions */
#include "type.h"
#include "irq.h"
#include "timer.h"
#include "wdt.h"

volatile DWORD wdt_counter;

/*****************************************************************************
** Function name:		WDTHandler
**
** Descriptions:		Watchdog timer interrupt handler
**
** parameters:			None
** Returned value:		None
** 
*****************************************************************************/
void WDTHandler(void)
{  
  WDT_SR |= 0x03;	/* clear m0 and m1 interrupt flag */		  
  IENABLE;			/* handles nested interrupt */
  wdt_counter++;
  IDISABLE;
  return;
}

/*****************************************************************************
** Function name:		WDTInit
**
** Descriptions:		Initialize watchdog timer, install the
**						watchdog timer interrupt handler
**
** parameters:			None
** Returned value:		true or false, return false if the VIC table
**						is full and WDT interrupt handler can be
**						installed.
** 
*****************************************************************************/
DWORD WDTInit( void )
{
  wdt_counter = 0;
  /* Configure Interrupt Controller */
  /* Set event router to IRQ1 for WDT */
  EVIOMS12 |= (0x1<<29);	/* WDT interrupt is enabled. */
  EVAPR2 = 0x1<<29;			/* rising edge */ 
  EVATR2 = 0x1<<29;			/* edge trigger */

  if ( install_IRQ(2, 1, WDTHandler ) == FALSE )
  {
	return( FALSE );
  }
  INT_REQ2=(1<<28)|(1<<27)|(1<<26)|(1<<16)|0x1;
  INT_VECTOR0=IRQ_TABLE_BASE & MASK_INDEX;		

  WDT_TCR = 0x0;			/* disable WDT */
  WDT_PR = 0x3;				/* Prescale is 4 clocks */
  WDT_MR0 = 0x40000;		/* Interrupt at 4 x 0x40000=8M clocks */
  WDT_MR1 = 0x80000;		/* Reset at 4 x 0x80000=16M clocks */
  WDT_MCR = 0x01;			/* Enable status bit for interrupt */
#if 0
  /* Be careful that if you enable the WDT reset, WDT reset will 
  occur before WDT interrupt is being handled. */ 
  WDT_EMR = 0xA0;			/* Drive m0 and m1 high on match,
  							   enable WDT interrupt and reset */
#else
  WDT_EMR = 0x20;			/* Drive m0 and m1 high on match,
  							   enable WDT interrupt only */
#endif
  WDT_TCR = WDEN | WDRESET;	/* Counter enable and reset */
  WDT_TCR = WDEN;			/* Start counting, if WDRESET is set,
  							the counter will remain cleared. */
  return( TRUE );
}

/*****************************************************************************
** Function name:		WDTFeed
**
** Descriptions:		Clear WDT timer/counter to prevent from timeout
**
** parameters:			None
** Returned value:		None
** 
*****************************************************************************/
void WDTFeed( void )
{
  WDT_TCR |= WDRESET;	/* Clear WDT timer or interrupt/reset will occur */
  WDT_TCR &= ~WDRESET;
  return;
}

/******************************************************************************
**                            End Of File
******************************************************************************/