?? main.c
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/* added by He xiaocheng 2003.6.30 ,
mainly used for scaning a channel by
Frequency,Symbolrate,Qammode*/
/* Scaning range Carrier Frequency 47MHz----900MHz
SymbolRate 0.87MBps --11.7MBps
QAMSize 16---256
**************************************************/
/* SOFTWARE ARCHETECTURE */
/*
TunerScan
Reg0297_Installb
demod_d0297_init
tuner_MT2040_init
ProcesScan
{ demod_d0297_ScanFrequencyb, LOOP 5
Drv0297_InitSearchb Driv0297CarrierSearchb()
END TunerSetFrequency Driv0297DataSearchb
{ MT_IsSpurInBandb {STI2C0297_WRITE
TCDRV_MT_SelectVCOb STI2C0297_Reload
STI2C2040_WRITE Driv0297DemodSettingb
TCDRV_MT_AdjustVCOb STI2C0297_SETFIELD
TCDRV_MT_CheckLOLockb STI2C0297_GETFIELD
TCDRV_MT_GetTunerLockb Reg0297_SetQAMSizeb
STI2C2040_READ} Reg0297_SetSymbolRateb
Reg0297_SetSweepRateb
Reg0297_SetFrequencyOffsetb
DAVINCIEVM_waitusec}
}
*/
//#include <reg2040b.h>
//#include "reg0297b.h"
#include "string.h"
#include "stdlib.h"
#include "stdio.h"
#include "davincievm.h"
#include "davincievm_i2c.h"
#include "file.h"
//#include "memalloc.h"
#define STV0297_I2C_ADDR 0x1c
#define TUNER_I2C_ADDR 0x60
#define D0297_QAM16 0
#define D0297_QAM32 1
#define D0297_QAM64 4
#define D0297_QAM128 2
#define D0297_QAM256 3
#define FIELD_TYPE_UNSIGNED 0
#define FIELD_TYPE_SIGNED 1
//#define TCDRV_MT_SRO_FREQ 5250
#define IntermediateFrequency 36000
#define TunerStep 62500
#define BandWidth 8000
#define FreqFactor 1000
#define TunerLowBand 146000
#define TunerMidBand 430000
//#define TCDRV_MT2040_MAX_LOSpurHarmonic 7
#define MAC0297_B0(X) ((X & 0xFF))
#define MAC0297_B1(Y) ((Y>>8)& 0xFF)
#define MAC0297_B2(Y) ((Y>>16)& 0xFF)
#define MAC0297_B3(Y) ((Y>>24)& 0xFF)
#define STV0297_SYMBOLRATE_LEVEL 3000000
#define STV0297_AGC2_MAX_LEVEL 600
#define STV0297_DEMOD_TRACKING_LOCK 5
//#define STV0297_SYMBOLRATE_LEVEL 3000000
#define STV0297_SYMBOLMIN 870000 /* 1 MegaSymbols/sec (e.g) */
#define STV0297_SYMBOLMAX 11700000 /* 11 MegaSymbols/sec (e.g) */
#define DIG_ROLL_OFF_SCALING 100
#define SCALED_DIG_ROLL_OFF 135 /* Actual 1.35 */
#define BandStart 47000000 /* Hz */
#define BandEnd 900000000 /* Hz */
#define EXTERCLK 28800000 /*Hz*/
//#define TCDRV_IOBUFFER_SIZE_MT 21 /* 21 registers for MT2030/40 */
#define TCDRV_MT_WAITING_TIME 10 /* In ms (Init Tuner MT) */
#define DEF0297_NBREG 85
#define DEF0297_NBFIELD 188
#define TCDRV_IO_TIMEOUT 10
#define IOREG_DEFAULT_TIMEOUT 20
//#define STV0297_DelayInMicroSec(micro_sec) task_delay((unsigned int) \
// (((micro_sec) + 999) / 1000) * \
// ST_GetClocksPerSecond() / 1000)
//#define STV0297_DelayInMilliSec(milli_sec) STV0297_DelayInMicroSec(milli_sec*1000)
#define STV0297_DEMOD_WAITING_TIME 5 /* In ms */
#define R0297_EQU_0 0
#define R0297_EQU_1 1
#define R0297_EQU_3 2
#define R0297_EQU_4 3
#define R0297_EQU_7 4
#define R0297_EQU_8 5
#define R0297_INITDEM_0 6
#define R0297_INITDEM_1 7
#define R0297_INITDEM_2 8
#define R0297_INITDEM_3 9
#define R0297_INITDEM_4 10
#define R0297_INITDEM_5 11
#define R0297_DELAGC_0 12
#define R0297_DELAGC_1 13
#define R0297_DELAGC_2 14
#define R0297_DELAGC_3 15
#define R0297_DELAGC_4 16
#define R0297_DELAGC_5 17
#define R0297_DELAGC_6 18
#define R0297_DELAGC_7 19
#define R0297_DELAGC_8 20
#define R0297_WBAGC_0 21
#define R0297_WBAGC_1 22
#define R0297_WBAGC_2 23
#define R0297_WBAGC_3 24
#define R0297_WBAGC_4 25
#define R0297_WBAGC_5 26
#define R0297_WBAGC_6 27
#define R0297_WBAGC_9 28
#define R0297_WBAGC_10 29
#define R0297_WBAGC_11 30
#define R0297_STLOOP_2 31
#define R0297_STLOOP_3 32
#define R0297_STLOOP_5 33
#define R0297_STLOOP_6 34
#define R0297_STLOOP_7 35
#define R0297_STLOOP_8 36
#define R0297_STLOOP_9 37
#define R0297_STLOOP_10 38
#define R0297_STLOOP_11 39
#define R0297_CRL_0 40
#define R0297_CRL_1 41
#define R0297_CRL_2 42
#define R0297_CRL_3 43
#define R0297_CRL_4 44
#define R0297_CRL_5 45
#define R0297_CRL_6 46
#define R0297_CRL_7 47
#define R0297_CRL_8 48
#define R0297_CRL_9 49
#define R0297_CRL_10 50
#define R0297_CRL_11 51
#define R0297_PMFAGC_0 52
#define R0297_PMFAGC_1 53
#define R0297_PMFAGC_2 54
#define R0297_PMFAGC_3 55
#define R0297_PMFAGC_4 56
#define R0297_CTRL_0 57
#define R0297_CTRL_1 58
#define R0297_CTRL_2 59
#define R0297_CTRL_3 60
#define R0297_CTRL_4 61
#define R0297_CTRL_5 62
#define R0297_CTRL_6 63
#define R0297_CTRL_7 64
#define R0297_CTRL_8 65
#define R0297_CTRL_9 66
#define R0297_DEINT_SYNC_0 67
#define R0297_DEINT_SYNC_1 68
#define R0297_BERT_0 69
#define R0297_BERT_1 70
#define R0297_BERT_2 71
#define R0297_DEINT_0 72
#define R0297_DEINT_1 73
#define R0297_OUTFORMAT_0 74
#define R0297_OUTFORMAT_1 75
#define R0297_OUTFORMAT_2 76
#define R0297_RS_DESC_0 77
#define R0297_RS_DESC_1 78
#define R0297_RS_DESC_2 79
#define R0297_RS_DESC_3 80
#define R0297_RS_DESC_4 81
#define R0297_RS_DESC_5 82
#define R0297_RS_DESC_14 83
#define R0297_RS_DESC_15 84
#define R0297_TST_EQU_2 85
#define F0297_U_THRESHOLD 0
#define F0297_MODE_SELECT 1
#define F0297_BLIND_U 2
#define F0297_INITIAL_U 3
#define F0297_EQ_FSM_CTL 4
#define F0297_EQ_COEFF_CTL 5
#define F0297_NBLIND 6
#define F0297_NOISE_EST_LO 7
#define F0297_NOISE_EST_HI 8
#define F0297_DEM_FQCY_LO 9
#define F0297_DEM_FQCY_HI 10
#define F0297_LATENCY 11
#define F0297_SCAN_STEP_LO 12
#define F0297_CHSCANITEN 13
#define F0297_CHSCANITSOFT 14
#define F0297_SCAN_STEP_HI 15
#define F0297_IN_DEMOD_EN 16
#define F0297_SCAN_ON 17
#define F0297_AUTOSTOP 18
#define F0297_SCALE_A 19
#define F0297_SCALE_B 20
#define F0297_AGC2MAX 21
#define F0297_AGC2MIN 22
#define F0297_AGC1MAX 23
#define F0297_AGC1MIN 24
#define F0297_RATIO_A 25
#define F0297_RATIO_B 26
#define F0297_RATIO_C 27
#define F0297_AGC2_THRES 28
#define F0297_DAGC_ON 29
#define F0297_FRZ2_CTRL 30
#define F0297_FRZ1_CTRL 31
#define F0297_TIME_CST 32
#define F0297_OVF_RATE_LO 33
#define F0297_CORNER_RATE_LO 34
#define F0297_OVF_RATE_HI 35
#define F0297_CORNER_RATE_HI 36
#define F0297_I_REF 37
#define F0297_AGC2SD_LO 38
#define F0297_AGC2SD_HI 39
#define F0297_ACQ_THRESH 40
#define F0297_WAGC_CLR 41
#define F0297_WAGC_INV 42
#define F0297_WAGC_EN 43
#define F0297_WAGC_ACQ 44
#define F0297_SWAP 45
#define F0297_ROLL_LO 46
#define F0297_ACQ_COUNT_LO 47
#define F0297_ACQ_COUNT_HI 48
#define F0297_ROLL_HI 49
#define F0297_IF_PWM_LO 50
#define F0297_TARGET_RATE_LO 51
#define F0297_IF_PWM_HI 52
#define F0297_TARGET_RATE_HI 53
#define F0297_GAIN_SCALE_PATH0 54
#define F0297_GAIN_SCALE_PATH1 55
#define F0297_INTEGRAL_GAIN_HI 56
#define F0297_DIRECT_GAIN_LO 57
#define F0297_SYMB_RATE_0 58
#define F0297_SYMB_RATE_1 59
#define F0297_SYMB_RATE_2 60
#define F0297_SYMB_RATE_3 61
#define F0297_INTEGRAL_GAIN_LO 62
#define F0297_DIRECT_GAIN_HI 63
#define F0297_PHASE_EN 64
#define F0297_PHASE_CLR 65
#define F0297_ERR_RANGE 66
#define F0297_ALGOSEL 67
#define F0297_ERR_CLR 68
#define F0297_ERR_EN 69
#define F0297_SWEEP_LO 70
#define F0297_GAIN_INT 71
#define F0297_GAIN_DIR 72
#define F0297_GAIN_INT_ADJ 73
#define F0297_GAIN_DIR_ADJ 74
#define F0297_APHASE_0 75
#define F0297_APHASE_1 76
#define F0297_APHASE_2 77
#define F0297_IPHASE_0 78
#define F0297_IPHASE_1 79
#define F0297_IPHASE_2 80
#define F0297_IPHASE_3 81
#define F0297_SWEEP_HI 82
#define F0297_SWEEP_EN 83
#define F0297_PH_EN 84
#define F0297_DIR_EN 85
#define F0297_INT_EN 86
#define F0297_DIR_DIS 87
#define F0297_INT_DIS 88
#define F0297_CRL_SNAPSHOT 89
#define F0297_LOCK_THRES_LO 90
#define F0297_PMFA_F_UNLOCK 91
#define F0297_PMFA_F_LOCK 92
#define F0297_WBAGC_F_LOCK 93
#define F0297_UP_STOP 94
#define F0297_LOCK_THRES_HI 95
#define F0297_PMFA_ACC0 96
#define F0297_PMFA_ACC1 97
#define F0297_PMFA_LOCK_STATE 98
#define F0297_PMFA_ACC2 99
#define F0297_SOFT_RESET 100
#define F0297_VERSION 101
#define F0297_RESET_DI 102
#define F0297_RS_UNCORR 103
#define F0297_CORNER_LOCK 104
#define F0297_EQU_LMS2 105
#define F0297_EQU_LMS1 106
#define F0297_PMFAGC_IT 107
#define F0297_WBAGC_IT 108
#define F0297_J83C 109
#define F0297_DFS 110
#define F0297_SPEC_INV 111
#define F0297_RESET_RS 112
#define F0297_RESET_EQL 113
#define F0297_CKX2SEL 114
#define F0297_CKX2DIS 115
#define F0297_INVADCLK 116
#define F0297_M_OEN 117
#define F0297_AGC_OD 118
#define F0297_LOCKPOL 119
#define F0297_DI_SY_MASK 120
#define F0297_DI_SY_EV 121
#define F0297_DI_SY_DIR 122
#define F0297_SYNC_MSK 123
#define F0297_SYNC_EV 124
#define F0297_SYNC_DIR 125
#define F0297_I2CT_EN 126
#define F0297_SCLT_OD 127
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