;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source          : Interrupt.s79
;- Object               : MSR Read and Write
;- Compilation flag     : None
;-
;- 1.0 12/Sep/05 JPP    : Creation
;------------------------------------------------------------------------------

;------------------------------------------------------------------------------
;- Area Definition
;------------------------------------------------------------------------------
	PROGRAM	?AT91F_interrupt

	RSEG	ICODE:CODE:ROOT(2)
  	CODE32  ; Always ARM mode to msr

#define IRQ_MASK  0x00000080
#define FIQ_MASK  0x00000040
#define INTs_MASK (IRQ_MASK | FIQ_MASK)

;*----------------------------------------------------------------------------
;* \fn    extern void AT91F_enable_interrupt(void);
;* \brief Enable Core interrupt
;*----------------------------------------------------------------------------
  	PUBLIC  AT91F_enable_interrupt

AT91F_enable_interrupt
        mrs    r0,CPSR
        bic    r0,r0,#INTs_MASK
        msr    CPSR_c,r0
        bx     lr

;*----------------------------------------------------------------------------
;* \fn    extern void AT91F_disable_interrupt(void);
;* \brief Disable Core interrupt
;*----------------------------------------------------------------------------
  	PUBLIC  AT91F_disable_interrupt
AT91F_disable_interrupt

        mrs     r0,CPSR
        orr     r0,r0,#INTs_MASK
        msr     CPSR_c,r0
        mrs     r0,CPSR
        ands    r0,r0,#INTs_MASK
        beq     AT91F_disable_interrupt
        bx      lr

	ENDMOD

	END