/* sysLib.c - Motorola 860ads board system-dependent library *//* Copyright 1984-1997 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01w,17may02,dtr  Changing INCLUDE_AUXCLK to INCLUDE_AUX_CLK.01v,10may02,dtr  Fix for SPR 34619. MPC860 Errata SIU 9.01u,07mar02,dtr  Wrap cpm refrences with INCLUDE_CPM_END.		 Made 860Timer/DecTimer conditional on INLCUDE_AUXCLK.01t,28jan02,dtr  Removing reference to if_cpm.h.01s,12dec01,dtr  Adding support for 32bit branching for exception vectors as                 an option.01r,28nov01,bur  Added support for Rev D of MPC860. (SPR# 62594)01r,06dec01,dtr  Removing #include "sysTffs.c" now included outside BSP.01q,15nov01,dtr  Fixing sysToMonitor. SPR 29853.01p,29oct01,dtr  Removing diab compiler warnings.01o,23oct01,dtr  Fix for SPR 65678. Boot lockup problem. USE_KEYED_REGS.01n,03oct00,js  Added support for 850SARDB cpu.01m,18mar99,cn   added support for motCpmEnd driver (SPR# 25839).01l,03dec98,mas  added GUARDED attributes to non-local memory areas mapped in		 sysPhysMemDesc[]. (SPR 23674)01k,12nov98,cn   changed sysFecEnetEnable(), sysFecEnetDisable() to                 enable/disable the PHY device.01j,09nov98,cn   added support for FADS860T boards and FEC.01i,08may98,gls  added clear of all cpm interrups in sysToMonitor01h,08mar98,gls	 added checks to allow BSP to work with the PPC850FADS01g,18feb98,gls  added code to allow the BSP to work with the PPC823FADS01f,12nov97,map  updated to use ppc860Timer.c [SPR# 9366]01e,21feb97,mas  removed NOMANUAL, made sysHwInit2() visible to 'man' (SPR 7879)01d,11nov96,tam  added power management mode initialization.01c,06nov96,tpr  reworked sysHwInit().01b,28may96,dzb  added Ethernet driver support routines.		 added port initialization, and increased system to 24Mhz.01a,19apr96,tpr  written.*//*DESCRIPTIONThis library provides board-specific routines.  The chip drivers included are:    ppc860Timer.c	- PowerPC/860 Timer library    sysMotCpmEnd.c	- configuration module for the motCpmEnd driverINCLUDE FILES: sysLib.hSEE ALSO:.pG "Configuration"*//* includes */#include "vxWorks.h"#include "vme.h"#include "memLib.h"#include "cacheLib.h"#include "sysLib.h"#include "config.h"#include "string.h"#include "intLib.h"#include "logLib.h"#include "stdio.h"#include "taskLib.h"#include "vxLib.h"#include "tyLib.h"#include "arch/ppc/vxPpcLib.h"#include "private/vmLibP.h"#include "drv/multi/ppc860Siu.h"#include "ads860.h"#ifdef	INCLUDE_CPM_END#include "drv/end/motCpmEnd.h"#endifIMPORT UINT32   vx860KeyedRegUsed;IMPORT void     vxPlprcrSet (UINT32*,UINT32,UINT32);#define ISYNC WRS_ASM(" isync");PHYS_MEM_DESC sysPhysMemDesc [] =    {    {    (void *) LOCAL_MEM_LOCAL_ADRS,    (void *) LOCAL_MEM_LOCAL_ADRS,    LOCAL_MEM_SIZE ,    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE    },    {    (void *) BCSR0,    (void *) BCSR0,    0x00001000,				/* 4 k - Board Control and Status */	    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |    VM_STATE_MASK_GUARDED,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |    VM_STATE_GUARDED    },#ifdef INCLUDE_TFFS    {    (void *) PC_BASE_ADRS_0,    (void *) PC_BASE_ADRS_0,    PC_SIZE_0,                          /* 1 m - PCMCIA window 0 */    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |    VM_STATE_MASK_GUARDED,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |    VM_STATE_GUARDED    },    {    (void *) PC_BASE_ADRS_1,    (void *) PC_BASE_ADRS_1,    PC_SIZE_1,                          /* 32 m - PCMCIA window 1 */    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |    VM_STATE_MASK_GUARDED,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |    VM_STATE_GUARDED    },#endif /* INCLUDE_TFFS */    {    (void *) INTERNAL_MEM_MAP_ADDR,    (void *) INTERNAL_MEM_MAP_ADDR,    INTERNAL_MEM_MAP_SIZE,		/* 64 k - Internal Memory Map */	    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |    VM_STATE_MASK_GUARDED,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |    VM_STATE_GUARDED    },    {    (void *) ROM_BASE_ADRS,    (void *) ROM_BASE_ADRS,    ROM_SIZE,				/* Flach memory */	    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE ,    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT     }    };int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);int   sysBus      = BUS;                /* system bus type (VME_BUS, etc) */int   sysCpu      = CPU;                /* system CPU type (PPC860) */char *sysBootLine = BOOT_LINE_ADRS;	/* address of boot line */char *sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */int   sysProcNum;			/* processor number of this CPU */int   sysFlags;				/* boot flags */char  sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */char  sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */BOOL  sysVmeEnable = FALSE;		/* by default no VME */#ifdef	INCLUDE_CPM_END/* XXX set the following array to a unique Ethernet hardware address XXX *//* last 5 nibbles are board specific, initialized in sysHwInit */unsigned char sysCpmEnetAddr [6] = {0x08, 0x00, 0x3e, 0x32, 0x53, 0x21};/* locals */void sysCpmEnetDisable (int unit);void sysCpmEnetIntDisable (int unit);#endif	/* INCLUDE_CPM_END */#ifdef INCLUDE_MOT_FEC/* set the following array to a unique Ethernet hardware address */unsigned char sysFecEnetAddr [6] = {0x08, 0x00, 0x3e, 0x32, 0x53, 0x22};IMPORT STATUS sysFecEnetDisable (UINT32 motCpmaddr);#endif /* INCLUDE_MOT_FEC */#include "sysSerial.c"#include "intrCtl/ppc860Intr.c"#include "mem/nullNvRam.c"#ifdef INCLUDE_AUX_CLK#include "timer/ppc860Timer.c"		/* PPC860 & 821 have on chip timers */#else#include "timer/ppcDecTimer.c"#endif /* INCLUDE_AUX_CLK */#ifdef INCLUDE_CPM_END#   include "sysMotCpmEnd.c"		/* configuration module for motCpmEnd */#endif	/* INCLUDE_CPM_END *//******************************************************************************** sysModel - return the model name of the CPU board** This routine returns the model name of the CPU board.** RETURNS: A pointer to the string.*/char * sysModel (void)    {    return ("Motorola ADS - PowerPC 860");    }/******************************************************************************** sysBspRev - return the bsp version with the revision eg 1.0/<x>** This function returns a pointer to a bsp version with the revision.* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to* BSP_VERSION and returned.** RETURNS: A pointer to the BSP version/revision string.*/char * sysBspRev (void)    {    return (BSP_VERSION BSP_REV);    }#ifdef INCLUDE_SYS_HW_INIT_0/******************************************************************************* sysHwInit0 - Used here to enable extended exception vector support.** RETURNS: None.*/ void sysHwInit0 () {excExtendedVectors=TRUE; }#endif /*INCLUDE_SYS_HWINIT_0 *//******************************************************************************** sysHwInit - initialize the system hardware** This routine initializes various feature of the MPC860ADS boards. It sets up* the control registers, initializes various devices if they are present.** NOTE: This routine should not be called directly by the user.** RETURNS: N/A*/void sysHwInit (void)    {    UINT32	immrVal = vxImmrIsbGet();    UINT32      plprcrVal;    /* set the SPLL to the value requested */    /* SPR 65678, wrap PLPRCR, SCC in unlock/lock code */#ifdef USE_KEYED_REGS    vx860KeyedRegUsed=TRUE;#endif#ifdef USE_KEYED_REGS    * PLPRCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;    ISYNC;#endif    plprcrVal = ((*PLPRCR(immrVal) & ~PLPRCR_MF_MSK) | 		 (SPLL_MUL_FACTOR << PLPRCR_MF_SHIFT));    /* delay will be (3 * 16) + 2 clock cycles */    vxPlprcrSet ( (UINT32*)immrVal ,plprcrVal ,3 );#ifdef USE_KEYED_REGS    * PLPRCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);#endif    /* set the BRGCLK division factor */#ifdef USE_KEYED_REGS    * SCCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;    ISYNC;#endif    /* set the BRGCLK division factor */    * SCCR(immrVal) = (* SCCR(immrVal) & ~SCCR_DFBRG_MSK) |				(BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT);#ifdef USE_KEYED_REGS    * SCCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);#endif    /* set the Periodic Timer A value */         * MAMR(immrVal) = (* MAMR(immrVal) & ~MAMR_PTA_MSK) | 				(PTA_VALUE << MAMR_PTA_SHIFT);	    /* set the Periodic Timer PreScale */    * MPTPR(immrVal) = PTP_VALUE;    /* reset the port A */    *PAPAR(immrVal) = 0;    *PADIR(immrVal) = 0;    *PAODR(immrVal) = 0;    /* reset the port B */    *PBPAR(immrVal) = 0;    *PBDIR(immrVal) = 0;    *PBODR(immrVal) = 0;    /* reset the port C */    *PCPAR(immrVal) = 0;    *PCDIR(immrVal) = 0;    *PCSO(immrVal)  = 0;    /* reset the port D */    *PDPAR(immrVal) = 0;    *PDDIR(immrVal) = 0;    *SICR(immrVal) = 0;			/* initialize SI/NMSI connections */    /* Initialize interrupts */    ppc860IntrInit(IV_LEVEL4);	/* default vector level */    /* Reset serial channels */    sysSerialHwInit();    /* make sure Ethernet is disabled */#ifdef INCLUDE_CPM_END    sysCpmEnetDisable (0);    sysCpmEnetIntDisable (0);#endif /* INCLUDE_CPM_END */#ifdef INCLUDE_MOT_FEC    /* make sure the FEC is disabled */    sysFecEnetDisable (immrVal);#endif /* INCLUDE_MOT_FEC */    /*     * The power management mode is initialized here. Reduced power mode     * is activated only when the kernel is iddle (cf vxPowerDown).     * Power management mode is selected via vxPowerModeSet().     * DEFAULT_POWER_MGT_MODE is defined in config.h.     */    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);    }/********************************************************************************* sysPhysMemTop - get the address of the top of physical memory** This routine returns the address of the first missing byte of memory,* which indicates the top of memory.** RETURNS: The address of the top of physical memory.** SEE ALSO: sysMemTop()*/char * sysPhysMemTop (void)    {    static char * physTop = NULL;    if (physTop == NULL)	{	physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);	}    return (physTop) ;    }/********************************************************************************* sysMemTop - get the address of the top of VxWorks memory** This routine returns a pointer to the first byte of memory not* controlled or used by VxWorks.** The user can reserve memory space by defining the macro USER_RESERVED_MEM* in config.h.  This routine returns the address of the reserved memory* area.  The value of USER_RESERVED_MEM is in bytes.** RETURNS: The address of the top of VxWorks memory.*/char * sysMemTop (void)    {    static char * memTop = NULL;    if (memTop == NULL)	{	memTop = sysPhysMemTop () - USER_RESERVED_MEM;	}    return memTop;    }/******************************************************************************** sysToMonitor - transfer control to the ROM monitor** This routine transfers control to the ROM monitor.  Normally, it is called* only by reboot()--which services ^X--and bus errors at interrupt level.* However, in some circumstances, the user may wish to introduce a* <startType> to enable special boot ROM facilities.** RETURNS: Does not return.*/STATUS sysToMonitor    (     int startType	/* parameter passed to ROM to tell it how to boot */    )    {    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4);	/* Warm reboot */#if defined(INCLUDE_CACHE_SUPPORT)    cacheDisable (0);        /* Disable the Instruction Cache */    cacheDisable (1);        /* Disable the Data Cache */#endif    *CIMR(vxImmrIsbGet()) = 0;     /* disable all cpm interupts */#ifdef INCLUDE_CPM_END        sysCpmEnetDisable (0);	/* disable the ethernet device */#endif #ifdef INCLUDE_MOT_FEC    /* disable the FEC */    sysFecEnetDisable ( vxImmrIsbGet());#endif /* INCLUDE_MOT_FEC */    sysSerialReset();		/* reset the serail device */    /* Clear the MSR */    vxMsrSet (0);    WRS_ASM("sync");    (*pRom) (startType);	/* jump to bootrom entry point */    return (OK);	/* in case we ever continue from ROM monitor */    }/******************************************************************************** sysHwInit2 - additional system configuration and initialization** This routine connects system interrupts and does any additional* configuration necessary.** RETURNS: N/A*/void sysHwInit2 (void)    {    static BOOL configured = FALSE;    int		immrVal;    if (!configured)	{	immrVal = vxImmrIsbGet();	/* initialize serial interrupts */	sysSerialHwInit2();#ifdef USE_KEYED_REGS    * SCCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;    ISYNC;#endif	* SCCR(immrVal) &= ~SCCR_TBS;#ifdef USE_KEYED_REGS    * SCCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);#endif	/* un-freeze the Time Base clock */#ifdef USE_KEYED_REGS    * TBSCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;    ISYNC;#endif         	* TBSCR(immrVal) = TBSCR_TBE ;#ifdef USE_KEYED_REGS    * TBSCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);    ISYNC;#endif	configured = TRUE;	}    }/******************************************************************************** sysProcNumGet - get the processor number** This routine returns the processor number for the CPU board, which is* set with sysProcNumSet().