+	if (cnt == 0) {+		return ERR_OK;+	}++	/*+	 * handle unaligned tail bytes+	 */+	data = 0;+	for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {+		data = (data >> 8) | (*src++ << 8);+		--cnt;+	}+	for (; i < 2; ++i, ++cp) {+		data = (data >> 8) | (*(uchar *) cp << 8);+	}++	return write_hword (info, wp, data);+}diff -Nur u-boot-1.2.0/board/max2440p/lowlevel_init.S magic-boot-2440-v1.0/board/max2440p/lowlevel_init.S--- u-boot-1.2.0/board/max2440p/lowlevel_init.S	1970-01-01 08:00:00.000000000 +0800+++ magic-boot-2440-v1.0/board/max2440p/lowlevel_init.S	2007-06-29 17:42:00.000000000 +0800@@ -0,0 +1,167 @@+/*+ * Memory Setup stuff - taken from blob memsetup.S+ *+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and+ *                     Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)+ *+ * Modified for the Samsung SMDK2410 by+ * (C) Copyright 2002+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>+ *+ * See file CREDITS for list of people who contributed to this+ * project.+ *+ * This program is free software; you can redistribute it and/or+ * modify it under the terms of the GNU General Public License as+ * published by the Free Software Foundation; either version 2 of+ * the License, or (at your option) any later version.+ *+ * This program is distributed in the hope that it will be useful,+ * but WITHOUT ANY WARRANTY; without even the implied warranty of+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the+ * GNU General Public License for more details.+ *+ * You should have received a copy of the GNU General Public License+ * along with this program; if not, write to the Free Software+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,+ * MA 02111-1307 USA+ */+++#include <config.h>+#include <version.h>+++/* some parameters for the board */++/*+ *+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S+ *+ * Copyright (C) 2002 Samsung Electronics SW.LEE  <hitchcar@sec.samsung.com>+ *+ */++#define BWSCON	0x48000000++/* BWSCON */+#define DW8		 	(0x0)+#define DW16		 	(0x1)+#define DW32		 	(0x2)+#define WAIT		 	(0x1<<2)+#define UBLB		 	(0x1<<3)++#define B1_BWSCON	  	(DW32)+#define B2_BWSCON	  	(DW16)+#define B3_BWSCON	  	(DW16 + WAIT + UBLB)+#define B4_BWSCON	  	(DW16)+#define B5_BWSCON	  	(DW16)+#define B6_BWSCON	  	(DW32)+#define B7_BWSCON	  	(DW32)++/* BANK0CON */+#define B0_Tacs		 	0x0	/*  0clk */+#define B0_Tcos		 	0x0	/*  0clk */+#define B0_Tacc		 	0x7	/* 14clk */+#define B0_Tcoh		 	0x0	/*  0clk */+#define B0_Tah		 	0x0	/*  0clk */+#define B0_Tacp		 	0x0+#define B0_PMC		 	0x0	/* normal */++/* BANK1CON */+#define B1_Tacs		 	0x0	/*  0clk */+#define B1_Tcos		 	0x0	/*  0clk */+#define B1_Tacc		 	0x7	/* 14clk */+#define B1_Tcoh		 	0x0	/*  0clk */+#define B1_Tah		 	0x0	/*  0clk */+#define B1_Tacp		 	0x0+#define B1_PMC		 	0x0++#define B2_Tacs		 	0x0+#define B2_Tcos		 	0x0+#define B2_Tacc		 	0x7+#define B2_Tcoh		 	0x0+#define B2_Tah		 	0x0+#define B2_Tacp		 	0x0+#define B2_PMC		 	0x0++#define B3_Tacs		 	0x0	/*  0clk */+#define B3_Tcos		 	0x3	/*  4clk */+#define B3_Tacc		 	0x7	/* 14clk */+#define B3_Tcoh		 	0x1	/*  1clk */+#define B3_Tah		 	0x0	/*  0clk */+#define B3_Tacp		 	0x3     /*  6clk */+#define B3_PMC		 	0x0	/* normal */++#define B4_Tacs		 	0x0	/*  0clk */+#define B4_Tcos		 	0x0	/*  0clk */+#define B4_Tacc		 	0x7	/* 14clk */+#define B4_Tcoh		 	0x0	/*  0clk */+#define B4_Tah		 	0x0	/*  0clk */+#define B4_Tacp		 	0x0+#define B4_PMC		 	0x0	/* normal */++#define B5_Tacs		 	0x0	/*  0clk */+#define B5_Tcos		 	0x0	/*  0clk */+#define B5_Tacc		 	0x7	/* 14clk */+#define B5_Tcoh		 	0x0	/*  0clk */+#define B5_Tah		 	0x0	/*  0clk */+#define B5_Tacp		 	0x0+#define B5_PMC		 	0x0	/* normal */++#define B6_MT		 	0x3	/* SDRAM */+#define B6_Trcd	 	 	0x1+#define B6_SCAN		 	0x1	/* 9bit */++#define B7_MT		 	0x3	/* SDRAM */+#define B7_Trcd		 	0x1	/* 3clk */+#define B7_SCAN		 	0x1	/* 9bit */++/* REFRESH parameter */+#define REFEN		 	0x1	/* Refresh enable */+#define TREFMD		 	0x0	/* CBR(CAS before RAS)/Auto refresh */+#define Trp		 	0x0	/* 2clk */+#define Trc		 	0x3	/* 7clk */+#define Tchr		 	0x2	/* 3clk */+#define REFCNT		 	1113	/* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */+/**************************************/++_TEXT_BASE:+	.word	TEXT_BASE++.globl lowlevel_init+lowlevel_init:+	/* memory control configuration */+	/* make r0 relative the current location so that it */+	/* reads SMRDATA out of FLASH rather than memory ! */+	ldr     r0, =SMRDATA+	ldr	r1, _TEXT_BASE+	sub	r0, r0, r1+	ldr	r1, =BWSCON	/* Bus Width Status Controller */+	add     r2, r0, #13*4+0:+	ldr     r3, [r0], #4+	str     r3, [r1], #4+	cmp     r2, r0+	bne     0b++	/* everything is fine now */+	mov	pc, lr++	.ltorg+/* the literal pools origin */++SMRDATA:+    .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))+    .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))+    .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))+    .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))+    .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))+    .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))+    .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))+    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))+    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)+    .word 0x32+    .word 0x30+    .word 0x30diff -Nur u-boot-1.2.0/board/max2440p/Makefile magic-boot-2440-v1.0/board/max2440p/Makefile--- u-boot-1.2.0/board/max2440p/Makefile	1970-01-01 08:00:00.000000000 +0800+++ magic-boot-2440-v1.0/board/max2440p/Makefile	2007-06-29 13:45:33.000000000 +0800@@ -0,0 +1,51 @@+#+# (C) Copyright 2000-2006+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.+#+# See file CREDITS for list of people who contributed to this+# project.+#+# This program is free software; you can redistribute it and/or+# modify it under the terms of the GNU General Public License as+# published by the Free Software Foundation; either version 2 of+# the License, or (at your option) any later version.+#+# This program is distributed in the hope that it will be useful,+# but WITHOUT ANY WARRANTY; without even the implied warranty of+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the+# GNU General Public License for more details.+#+# You should have received a copy of the GNU General Public License+# along with this program; if not, write to the Free Software+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,+# MA 02111-1307 USA+#++include $(TOPDIR)/config.mk++LIB	= $(obj)lib$(BOARD).a++COBJS	:= max2440p.o flash.o+SOBJS	:= lowlevel_init.o++SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)+OBJS	:= $(addprefix $(obj),$(COBJS))+SOBJS	:= $(addprefix $(obj),$(SOBJS))++$(LIB):	$(obj).depend $(OBJS) $(SOBJS)+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)++clean:+	rm -f $(SOBJS) $(OBJS)++distclean:	clean+	rm -f $(LIB) core *.bak .depend++#########################################################################++# defines $(obj).depend target+include $(SRCTREE)/rules.mk++sinclude $(obj).depend++#########################################################################diff -Nur u-boot-1.2.0/board/max2440p/max2440p.c magic-boot-2440-v1.0/board/max2440p/max2440p.c--- u-boot-1.2.0/board/max2440p/max2440p.c	1970-01-01 08:00:00.000000000 +0800+++ magic-boot-2440-v1.0/board/max2440p/max2440p.c	2007-06-29 16:04:53.000000000 +0800@@ -0,0 +1,123 @@+/*+ * (C) Copyright 2002+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>+ * Marius Groeger <mgroeger@sysgo.de>+ *+ * (C) Copyright 2002+ * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>+ *+ * See file CREDITS for list of people who contributed to this+ * project.+ *+ * This program is free software; you can redistribute it and/or+ * modify it under the terms of the GNU General Public License as+ * published by the Free Software Foundation; either version 2 of+ * the License, or (at your option) any later version.+ *+ * This program is distributed in the hope that it will be useful,+ * but WITHOUT ANY WARRANTY; without even the implied warranty of+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the+ * GNU General Public License for more details.+ *+ * You should have received a copy of the GNU General Public License+ * along with this program; if not, write to the Free Software+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,+ * MA 02111-1307 USA+ */++#include <common.h>+#include <s3c2440.h>++DECLARE_GLOBAL_DATA_PTR;++#define FCLK_SPEED 1++#if FCLK_SPEED==0		/* Fout = 203MHz, Fin = 12MHz for Audio */+#define M_MDIV	0xC3+#define M_PDIV	0x4+#define M_SDIV	0x1+#elif FCLK_SPEED==1		/* Fout = 202.8MHz */+#define M_MDIV	0xA1+#define M_PDIV	0x3+#define M_SDIV	0x1+#endif++#define USB_CLOCK 1++#if USB_CLOCK==0+#define U_M_MDIV	0xA1+#define U_M_PDIV	0x3+#define U_M_SDIV	0x1+#elif USB_CLOCK==1+#define U_M_MDIV	0x48+#define U_M_PDIV	0x3+#define U_M_SDIV	0x2+#endif++static inline void delay (unsigned long loops)+{+	__asm__ volatile ("1:\n"+	  "subs %0, %1, #1\n"+	  "bne 1b":"=r" (loops):"0" (loops));+}++/*+ * Miscellaneous platform dependent initialisations+ */++int board_init (void)+{+	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();++	/* to reduce PLL lock time, adjust the LOCKTIME register */+	clk_power->LOCKTIME = 0xFFFFFF;++	/* configure MPLL */+	clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);++	/* some delay between MPLL and UPLL */+	delay (4000);++	/* configure UPLL */+	clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);++	/* some delay between MPLL and UPLL */+	delay (8000);++	/* set up the I/O ports */+	gpio->GPACON = 0x007FFFFF;+	gpio->GPBCON = 0x00044555;+	gpio->GPBUP = 0x000007FF;+	gpio->GPCCON = 0xAAAAAAAA;+	gpio->GPCUP = 0x0000FFFF;+	gpio->GPDCON = 0xAAAAAAAA;+	gpio->GPDUP = 0x0000FFFF;+	gpio->GPECON = 0xAAAAAAAA;+	gpio->GPEUP = 0x0000FFFF;+	gpio->GPFCON = 0x000055AA;+	gpio->GPFUP = 0x000000FF;+	gpio->GPGCON = 0xFF95FFBA;+	gpio->GPGUP = 0x0000FFFF;+	gpio->GPHCON = 0x002AFAAA;+	gpio->GPHUP = 0x000007FF;++	/* arch number of SMDK2410-Board */+	gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;++	/* adress of boot parameters */+	gd->bd->bi_boot_params = 0x30000100;++	icache_enable();+	dcache_enable();++	return 0;+}++int dram_init (void)+{+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;++	return 0;+}diff -Nur u-boot-1.2.0/board/max2440p/u-boot.lds magic-boot-2440-v1.0/board/max2440p/u-boot.lds--- u-boot-1.2.0/board/max2440p/u-boot.lds	1970-01-01 08:00:00.000000000 +0800+++ magic-boot-2440-v1.0/board/max2440p/u-boot.lds	2007-06-29 13:45:02.000000000 +0800@@ -0,0 +1,57 @@+/*+ * (C) Copyright 2002+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>+ *+ * See file CREDITS for list of people who contributed to this+ * project.+ *+ * This program is free software; you can redistribute it and/or+ * modify it under the terms of the GNU General Public License as+ * published by the Free Software Foundation; either version 2 of+ * the License, or (at your option) any later version.+ *+ * This program is distributed in the hope that it will be useful,+ * but WITHOUT ANY WARRANTY; without even the implied warranty of+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the+ * GNU General Public License for more details.+ *+ * You should have received a copy of the GNU General Public License+ * along with this program; if not, write to the Free Software+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,+ * MA 02111-1307 USA+ */++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")+/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/+OUTPUT_ARCH(arm)+ENTRY(_start)+SECTIONS+{+	. = 0x00000000;++	. = ALIGN(4);+	.text      :+	{+	  cpu/arm920t/start.o	(.text)+	  *(.text)+	}++	. = ALIGN(4);+	.rodata : { *(.rodata) }++	. = ALIGN(4);+	.data : { *(.data) }++	. = ALIGN(4);+	.got : { *(.got) }++	. = .;+	__u_boot_cmd_start = .;+	.u_boot_cmd : { *(.u_boot_cmd) }+	__u_boot_cmd_end = .;++	. = ALIGN(4);+	__bss_start = .;+	.bss : { *(.bss) }+	_end = .;+}diff -Nur u-boot-1.2.0/cpu/arm920t/s3c24x0/i2c.c magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/i2c.c--- u-boot-1.2.0/cpu/arm920t/s3c24x0/i2c.c	2007-01-07 07:13:11.000000000 +0800+++ magic-boot-2440-v1.0/cpu/arm920t/s3c24x0/i2c.c	2007-06-29 15:22:05.000000000 +0800@@ -34,6 +34,8 @@ #include <s3c2400.h> #elif defined(CONFIG_S3C2410) #include <s3c2410.h>+#elif defined(CONFIG_S3C2440)+#include <s3c2440.h> #endif #include <i2c.h> @@ -62,8 +64,7 @@ static int GetI2CSDA(void) { 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();--#ifdef CONFIG_S3C2410+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440) 	return (gpio->GPEDAT & 0x8000) >> 15; #endif #ifdef CONFIG_S3C2400@@ -82,7 +83,7 @@ { 	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();