#include "I2C.h"

#define RAM_Length 720
#define RAM_Length_y 288


EX_INTERRUPT_HANDLER(DMA0_PPI_ISR);
bool Init_ADV7181(void);
void Read_ADV7181(void);
void Init_EBIU(void);
void Init_CPLD(void);

void Init_SDRAM(void);
void Init_PPI(void);
void Init_DMA(void);
void Close_ADV7181(void);



unsigned short PPI_DMA_DONE;
  int *pTSdram;
  int k;
unsigned char dataIn[40];
main()
{
	int o;
	bool ret = true;

    Set_PLL( (short)(CORECLK/CLKIN), (short)(CORECLK/SYSCLK)); 
    Init_EBIU();
    
    //Initial Interrupt 
   	register_handler(ik_ivg8,DMA0_PPI_ISR);
       *pSICB_IMASK0 = 0x00000800;

       Init_CPLD();
	if (!I2C_Init(ADV7181_IDENT_W))
	{
		while(1);
	}
//	I2C_Write(0x40,0x03);
//	*pCtrlReg1 = 0x31;
	if(!Init_ADV7181())
	{
		while(1);
	}
	
	Read_ADV7181();
    while(o < 10)
    	{	
	Init_DMA();
	Init_PPI();
	while(!PPI_DMA_DONE);
	o = o + 1;
	PPI_DMA_DONE = 0;

}
	while(1);
}


bool Init_ADV7181(void)
{
	if(!I2C_Write(0x00,0x15))
	{return false;}
	
	if(!I2C_Write(0x41,0x17))
	{return false;}
	
	if(!I2C_Write(0x16,0x3a))
	{return false;}
	
	if(!I2C_Write(0x04,0x50))
	{return false;}
	
	if(!I2C_Write(0x05,0xc3))
	{return false;}

	if(!I2C_Write(0x80,0xc4))
	{return false;}
	
	if(!I2C_Write(0x80,0x0e))
	{return false;}
	
	if(!I2C_Write(0x20,0x50))
	{return false;}
	
	if(!I2C_Write(0x18,0x52))
	{return false;}
	
	if(!I2C_Write(0xed,0x58))
	{return false;}
	
	if(!I2C_Write(0xc5,0x77))
	{return false;}
	
	if(!I2C_Write(0x93,0x7c))
	{return false;}
	
	if(!I2C_Write(0x00,0x7d))
	{return false;}
	
	if(!I2C_Write(0x48,0xd0))
	{return false;}
	
	if(!I2C_Write(0xa0,0xd5))
	{return false;}
	
	if(!I2C_Write(0xea,0xd7))
	{return false;}
	
	if(!I2C_Write(0x3e,0xe4))
	{return false;}
	
	if(!I2C_Write(0x0f,0xea))
	{return false;}
	
	if(!I2C_Write(0x00,0x0e))
	{return false;}
	
	return true;
}

void Read_ADV7181(void)
{
	I2C_Read(&dataIn[0],0x15);
	I2C_Read(&dataIn[1],0x17);
	I2C_Read(&dataIn[2],0x3a);
	I2C_Read(&dataIn[3],0x50);
	I2C_Read(&dataIn[4],0xc3);
	I2C_Read(&dataIn[5],0xc4);
	I2C_Read(&dataIn[6],0x0e);
	I2C_Read(&dataIn[7],0x52);
	I2C_Read(&dataIn[8],0x58);
	I2C_Read(&dataIn[9],0x77);
	I2C_Read(&dataIn[10],0x7c);
	I2C_Read(&dataIn[11],0x7d);
	I2C_Read(&dataIn[12],0xd0);
	I2C_Read(&dataIn[13],0xd5);
	I2C_Read(&dataIn[14],0xd7);
	I2C_Read(&dataIn[15],0xe4);
	I2C_Read(&dataIn[16],0xea);

}
void Init_CPLD(void)
{ 
	int i;
	*pCtrlReg1_S = 0x1;
	for(i = 0;i < 10000;i++);
	*pLED = 0x00;
	for(i = 0;i < 10000;i++); 
	*pCtrlReg2_S = 0x1;
	for(i = 0;i < 10000;i++); 
	
}

void Init_EBIU(void)
{
	
	*pEBIU_AMBCTL0	= 0x7bb07bb0;	// <--|Write access time = 7 cycles, read access time = 11 cycles, no ARDY
	*pEBIU_AMBCTL1	= 0x7bb07bb0;	//    |Hold time = 2 cycles, setup time = 3 cycles, transition time = 4 cycles
	*pEBIU_AMGCTL	= 0x00fF;		//	  |Enable all memory banks

}//end Init_EBIU



void Init_SDRAM(void)
{

	//SDRAM Refresh Rate Control Register
	*pEBIU_SDRRC = 0x00000817;	

	//SDRAM Memory Bank Control Register
	*pEBIU_SDBCTL = 0x00000013;

	//SDRAM Memory Global Control Register	
	*pEBIU_SDGCTL = 0x0091998d;	
														
		

}//end Init_SDRAM

void Init_PPI(void)
{

	//The PPI is set to receive 525 lines for each frame
	*pPPI0_FRAME =   625;	

	//PPI enabled, input mode, active video only, receive field 1&2, 
	//packing enabled, DMA32 enabled, skipping disabled, 8bit data bus, nothing inverted
	*pPPI0_CONTROL = PORT_EN | /*FLD_SEL |*/ PACK_EN | DMA32 | DLEN_8 /*& ~PORT_DIR*/;

	 
	/************NEW for test**************/ 
	
	//*pPPI_COUNT = 720;
//	*pPPI_CONTROL = 0x01fd;
	
}

void Init_DMA(void)
{

	//Target address of the DMA
	*pDMA1_0_START_ADDR = 0x0;	

	//RAM_Length 32bit transfers will be executed
	*pDMA1_0_X_COUNT = RAM_Length;

	//The modifier is set to 4 because of the 32bit transfers
	*pDMA1_0_X_MODIFY = 0x4;
	*pDMA1_0_Y_COUNT	= RAM_Length_y;
	*pDMA1_0_Y_MODIFY = 0x4;													

	//PPI Peripheral is used
	*pDMA1_0_PERIPHERAL_MAP = 0x0;	
	
	//DMA Config: Enable DMA | Memory write DMA | Discard DMA FIFO before start | enable assertation of interrupt | NDSIZE for stop mode | Enable STOP DMA
	//Enable 2D-DMA
	*pDMA1_0_CONFIG = DMAEN | DI_EN | WNR | WDSIZE_32 | RESTART | DMA2D ;//| DI_SEL;	
	//*pDMA0_CONFIG = DMAEN | DI_EN | WNR | WDSIZE_32 | RESTART | DMA2D ;//| DI_SEL;	
	

}//end Init_DMA



EX_INTERRUPT_HANDLER(DMA0_PPI_ISR)	// <--|declaration in  exception.h -->
{
//disable the interrupt request
        	*pDMA1_0_IRQ_STATUS = 0x1;   // to clear interrupt bit	
	        //temp2 = *pPPI_CONTROL;

	        *pPPI0_CONTROL &= 0xfffe;
				
	       printf( "\nThe DMA0 PPI Interrupt has been entered!\n" );
		   PPI_DMA_DONE = 1;
}