/******************************************************************************
*                                                                             *
* License Agreement                                                           *
*                                                                             *
* Copyright (c) 2007 Altera Corporation, San Jose, California, USA.           *
* All rights reserved.                                                        *
*                                                                             *
* Permission is hereby granted, free of charge, to any person obtaining a     *
* copy of this software and associated documentation files (the "Software"),  *
* to deal in the Software without restriction, including without limitation   *
* the rights to use, copy, modify, merge, publish, distribute, sublicense,    *
* and/or sell copies of the Software, and to permit persons to whom the       *
* Software is furnished to do so, subject to the following conditions:        *
*                                                                             *
* The above copyright notice and this permission notice shall be included in  *
* all copies or substantial portions of the Software.                         *
*                                                                             *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  *
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,    *
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE *
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER      *
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING     *
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER         *
* DEALINGS IN THE SOFTWARE.                                                   *
*                                                                             *
* This agreement shall be governed in all respects by the laws of the State   *
* of California and by the laws of the United States of America.              *
*                                                                             *
******************************************************************************/

module altera_avalon_checksum
	(
		//Global Avalon interface siganals    
		gls_clk,
		gls_reset_n,
		//Signals for Avalon-MM slave port
		avs_s1_address,
		avs_s1_chipselect_n,
		avs_s1_read_n,
		avs_s1_write_n,
		avs_s1_writedata,
		avs_s1_readdata,
		//Signals for read only Avalon-MM master port
		avm_m1_address,
		avm_m1_byteenable,
		avm_m1_read_n,
		avm_m1_readdata,
		avm_m1_waitrequest

	);

		input gls_clk;
		input gls_reset_n;
		
		input [2:0]avs_s1_address;
		input avs_s1_chipselect_n;
		input avs_s1_read_n;
		input avs_s1_write_n;
		input [31:0]avs_s1_writedata;
		output [31:0]avs_s1_readdata;
	
		output [31:0]avm_m1_address;
		output [3:0]avm_m1_byteenable;
		output avm_m1_read_n;
		input [31:0]avm_m1_readdata;
		input avm_m1_waitrequest;


		wire gls_clk;
		wire gls_reset_n;
		
		wire [2:0]avs_s1_address;
		wire avs_s1_read_n;
		wire avs_s1_write_n;
		wire [31:0]avs_s1_writedata;
		wire [31:0]avs_s1_readdata;
		wire avs_s1_chipselect_n;
		
		wire [31:0]avm_m1_address;
		wire [3:0]avm_m1_byteenable;
		wire avm_m1_read_n;
		wire [31:0] avm_m1_readdata;
		wire avm_m1_waitrequest;
		//Signals from s1_slave
		wire [31:0]addr_reg;
		wire [15:0]len_reg;
		wire go;
		//Signals for read_master
		wire read_busy;
		wire data_in_ready;
		wire [31:0]incomming_data;
		wire [15:0]result;


s1_slave slave_port
	(
		//Global Avalon interface siganals    
		.gls_clk(gls_clk),
		.gls_reset_n(gls_reset_n),
		//Signals for Avalon-MM slave port
		.avs_s1_address(avs_s1_address),
		.avs_s1_read_n(avs_s1_read_n),
		.avs_s1_write_n(avs_s1_write_n),
		.avs_s1_writedata(avs_s1_writedata),
		.avs_s1_readdata(avs_s1_readdata),
		.avs_s1_chipselect_n(avs_s1_chipselect_n),
		//Signals to Avalon-MM master module
		.addr_reg(addr_reg),
		.len_reg(len_reg),
		.go(go),
		//stop,
		.read_busy(read_busy),    // busy bit
		.edge_pulse(),  		  // debug port
		// result from checksum transform
		.result(result)        	  // data from transform
	);

read_master master_port
	(
		//Global Avalon interface siganals    
		.gls_clk(gls_clk),
		.gls_reset_n(gls_reset_n),
		//Signals for Avalon-MM master port
		.avm_m1_address(avm_m1_address),
		//.address(),  // test port
		.avm_m1_byteenable(avm_m1_byteenable),  //for byte level control  
		//avm_m1_chipselectn,  //needed?
		.avm_m1_read_n(avm_m1_read_n),
		.avm_m1_readdata(avm_m1_readdata),
		.avm_m1_waitrequest(avm_m1_waitrequest),
		//
		.addr_reg(addr_reg),
		.len_reg(len_reg),
		.go(go),
		//stop,
		.avm_m1_byteenable_mask(),
		.read_busy(read_busy),
		.data_in_ready(data_in_ready),  // debug port
		.count(),          				//debug might need for transform count
		.data_to_process(incomming_data) //read master data to transform
		
	);


checksum_task_logic transform(
		.gls_clk(gls_clk),
		.gls_reset_n(gls_reset_n),
		.go(go),
		.data_in_ready(data_in_ready),
		.data_to_process(incomming_data),
		.result(result)
		
		);

endmodule