library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity loader is
  port(data: in std_logic_vector(15 downto 0);
       load_8888:in std_logic;
       load_clk:in std_logic;
       load_done:in std_logic;
       load:out std_logic;
       load_val:out std_logic_vector(15 downto 0));
end loader;
architecture loader_arc of loader is
begin
    process(data,load_8888,load_clk,load_done)
    constant all_8: std_logic_vector(15 downto 0):="1000100010001000";
    constant done : std_logic_vector(15 downto 0):="1010101111001101";
    variable temp : std_logic_vector(2 downto 0);
    begin
     load<=load_8888 or load_done or load_clk;
     temp:=load_8888 & load_done & load_clk;
     case temp is
        when "100"=>load_val<=all_8;
        when "010"=>load_val<=done;
        when "001"=>load_val<=data;
        when others=>null;
     end case;
    end process;
end loader_arc;