;--------------------------------------------------------; File Created by SDCC : FreeWare ANSI-C Compiler; Version 2.6.0 #4309 (Nov 10 2006); This file generated Wed May 16 21:17:43 2007;--------------------------------------------------------	.module echo	.optsdcc -mmcs51 --model-small	;--------------------------------------------------------; Public variables in this module;--------------------------------------------------------	.globl _main	.globl _getchar	.globl _putchar	.globl _uart_init	.globl _TF1	.globl _TR1	.globl _TF0	.globl _TR0	.globl _IE1	.globl _IT1	.globl _IE0	.globl _IT0	.globl _SM0	.globl _SM1	.globl _SM2	.globl _REN	.globl _TB8	.globl _RB8	.globl _TI	.globl _RI	.globl _CY	.globl _AC	.globl _F0	.globl _RS1	.globl _RS0	.globl _OV	.globl _F1	.globl _P	.globl _RD	.globl _WR	.globl _T1	.globl _T0	.globl _INT1	.globl _INT0	.globl _TXD0	.globl _TXD	.globl _RXD0	.globl _RXD	.globl _P3_7	.globl _P3_6	.globl _P3_5	.globl _P3_4	.globl _P3_3	.globl _P3_2	.globl _P3_1	.globl _P3_0	.globl _P2_7	.globl _P2_6	.globl _P2_5	.globl _P2_4	.globl _P2_3	.globl _P2_2	.globl _P2_1	.globl _P2_0	.globl _P1_7	.globl _P1_6	.globl _P1_5	.globl _P1_4	.globl _P1_3	.globl _P1_2	.globl _P1_1	.globl _P1_0	.globl _P0_7	.globl _P0_6	.globl _P0_5	.globl _P0_4	.globl _P0_3	.globl _P0_2	.globl _P0_1	.globl _P0_0	.globl _PS	.globl _PT1	.globl _PX1	.globl _PT0	.globl _PX0	.globl _EA	.globl _ES	.globl _ET1	.globl _EX1	.globl _ET0	.globl _EX0	.globl _BREG_F7	.globl _BREG_F6	.globl _BREG_F5	.globl _BREG_F4	.globl _BREG_F3	.globl _BREG_F2	.globl _BREG_F1	.globl _BREG_F0	.globl _TMOD	.globl _TL1	.globl _TL0	.globl _TH1	.globl _TH0	.globl _TCON	.globl _SP	.globl _SCON	.globl _SBUF0	.globl _SBUF	.globl _PSW	.globl _PCON	.globl _P3	.globl _P2	.globl _P1	.globl _P0	.globl _IP	.globl _IE	.globl _DP0L	.globl _DPL	.globl _DP0H	.globl _DPH	.globl _B	.globl _ACC;--------------------------------------------------------; special function registers;--------------------------------------------------------	.area RSEG    (DATA)_ACC	=	0x00e0_B	=	0x00f0_DPH	=	0x0083_DP0H	=	0x0083_DPL	=	0x0082_DP0L	=	0x0082_IE	=	0x00a8_IP	=	0x00b8_P0	=	0x0080_P1	=	0x0090_P2	=	0x00a0_P3	=	0x00b0_PCON	=	0x0087_PSW	=	0x00d0_SBUF	=	0x0099_SBUF0	=	0x0099_SCON	=	0x0098_SP	=	0x0081_TCON	=	0x0088_TH0	=	0x008c_TH1	=	0x008d_TL0	=	0x008a_TL1	=	0x008b_TMOD	=	0x0089;--------------------------------------------------------; special function bits;--------------------------------------------------------	.area RSEG    (DATA)_BREG_F0	=	0x00f0_BREG_F1	=	0x00f1_BREG_F2	=	0x00f2_BREG_F3	=	0x00f3_BREG_F4	=	0x00f4_BREG_F5	=	0x00f5_BREG_F6	=	0x00f6_BREG_F7	=	0x00f7_EX0	=	0x00a8_ET0	=	0x00a9_EX1	=	0x00aa_ET1	=	0x00ab_ES	=	0x00ac_EA	=	0x00af_PX0	=	0x00b8_PT0	=	0x00b9_PX1	=	0x00ba_PT1	=	0x00bb_PS	=	0x00bc_P0_0	=	0x0080_P0_1	=	0x0081_P0_2	=	0x0082_P0_3	=	0x0083_P0_4	=	0x0084_P0_5	=	0x0085_P0_6	=	0x0086_P0_7	=	0x0087_P1_0	=	0x0090_P1_1	=	0x0091_P1_2	=	0x0092_P1_3	=	0x0093_P1_4	=	0x0094_P1_5	=	0x0095_P1_6	=	0x0096_P1_7	=	0x0097_P2_0	=	0x00a0_P2_1	=	0x00a1_P2_2	=	0x00a2_P2_3	=	0x00a3_P2_4	=	0x00a4_P2_5	=	0x00a5_P2_6	=	0x00a6_P2_7	=	0x00a7_P3_0	=	0x00b0_P3_1	=	0x00b1_P3_2	=	0x00b2_P3_3	=	0x00b3_P3_4	=	0x00b4_P3_5	=	0x00b5_P3_6	=	0x00b6_P3_7	=	0x00b7_RXD	=	0x00b0_RXD0	=	0x00b0_TXD	=	0x00b1_TXD0	=	0x00b1_INT0	=	0x00b2_INT1	=	0x00b3_T0	=	0x00b4_T1	=	0x00b5_WR	=	0x00b6_RD	=	0x00b7_P	=	0x00d0_F1	=	0x00d1_OV	=	0x00d2_RS0	=	0x00d3_RS1	=	0x00d4_F0	=	0x00d5_AC	=	0x00d6_CY	=	0x00d7_RI	=	0x0098_TI	=	0x0099_RB8	=	0x009a_TB8	=	0x009b_REN	=	0x009c_SM2	=	0x009d_SM1	=	0x009e_SM0	=	0x009f_IT0	=	0x0088_IE0	=	0x0089_IT1	=	0x008a_IE1	=	0x008b_TR0	=	0x008c_TF0	=	0x008d_TR1	=	0x008e_TF1	=	0x008f;--------------------------------------------------------; overlayable register banks;--------------------------------------------------------	.area REG_BANK_0	(REL,OVR,DATA)	.ds 8;--------------------------------------------------------; internal ram data;--------------------------------------------------------	.area DSEG    (DATA);--------------------------------------------------------; overlayable items in internal ram ;--------------------------------------------------------	.area	OSEG    (OVR,DATA);--------------------------------------------------------; Stack segment in internal ram ;--------------------------------------------------------	.area	SSEG	(DATA)__start__stack:	.ds	1;--------------------------------------------------------; indirectly addressable internal ram data;--------------------------------------------------------	.area ISEG    (DATA);--------------------------------------------------------; bit data;--------------------------------------------------------	.area BSEG    (BIT);--------------------------------------------------------; paged external ram data;--------------------------------------------------------	.area PSEG    (PAG,XDATA);--------------------------------------------------------; external ram data;--------------------------------------------------------	.area XSEG    (XDATA);--------------------------------------------------------; external initialized ram data;--------------------------------------------------------	.area XISEG   (XDATA)	.area HOME    (CODE)	.area GSINIT0 (CODE)	.area GSINIT1 (CODE)	.area GSINIT2 (CODE)	.area GSINIT3 (CODE)	.area GSINIT4 (CODE)	.area GSINIT5 (CODE)	.area GSINIT  (CODE)	.area GSFINAL (CODE)	.area CSEG    (CODE);--------------------------------------------------------; interrupt vector ;--------------------------------------------------------	.area HOME    (CODE)__interrupt_vect:	ljmp	__sdcc_gsinit_startup;--------------------------------------------------------; global & static initialisations;--------------------------------------------------------	.area HOME    (CODE)	.area GSINIT  (CODE)	.area GSFINAL (CODE)	.area GSINIT  (CODE)	.globl __sdcc_gsinit_startup	.globl __sdcc_program_startup	.globl __start__stack	.globl __mcs51_genXINIT	.globl __mcs51_genXRAMCLEAR	.globl __mcs51_genRAMCLEAR	.area GSFINAL (CODE)	ljmp	__sdcc_program_startup;--------------------------------------------------------; Home;--------------------------------------------------------	.area HOME    (CODE)	.area CSEG    (CODE)__sdcc_program_startup:	lcall	_main;	return from main will lock up	sjmp .;--------------------------------------------------------; code;--------------------------------------------------------	.area CSEG    (CODE);------------------------------------------------------------;Allocation info for local variables in function 'uart_init';------------------------------------------------------------;------------------------------------------------------------;	echo.c:4: void uart_init(void);	-----------------------------------------;	 function uart_init;	-----------------------------------------_uart_init:	ar2 = 0x02	ar3 = 0x03	ar4 = 0x04	ar5 = 0x05	ar6 = 0x06	ar7 = 0x07	ar0 = 0x00	ar1 = 0x01;	echo.c:6: SCON = 0x50;;	genAssign	mov	_SCON,#0x50;	echo.c:7: HIGH_NIBBLE_SET(TMOD, 2);;	genAnd	mov	a,#0x0F	anl	a,_TMOD;	genOr	orl	a,#0x20	mov	_TMOD,a;	echo.c:8: TH1 = 253;;	genAssign	mov	_TH1,#0xFD;	echo.c:9: PCON |= 0x80;;	genOr	orl	_PCON,#0x80;	echo.c:10: ES = 0;;	genAssign	clr	_ES;	echo.c:11: TR1 = 1;;	genAssign	setb	_TR1;	Peephole 300	removed redundant label 00101$	ret;------------------------------------------------------------;Allocation info for local variables in function 'putchar';------------------------------------------------------------;c                         Allocated to registers r2 ;------------------------------------------------------------;	echo.c:14: void putchar(char c);	-----------------------------------------;	 function putchar;	-----------------------------------------_putchar:;	genReceive	mov	r2,dpl;	echo.c:16: TI = 0;;	genAssign	clr	_TI;	echo.c:17: SBUF = c;;	genAssign	mov	_SBUF,r2;	echo.c:18: while(!TI)00101$:;	genIfx;	genIfxJump;	Peephole 108.d	removed ljmp by inverse jump logic	jnb	_TI,00101$;	Peephole 300	removed redundant label 00107$;	Peephole 300	removed redundant label 00104$	ret;------------------------------------------------------------;Allocation info for local variables in function 'getchar';------------------------------------------------------------;------------------------------------------------------------;	echo.c:22: char getchar(void);	-----------------------------------------;	 function getchar;	-----------------------------------------_getchar:;	echo.c:24: RI = 0;;	genAssign	clr	_RI;	echo.c:25: while(!RI)00101$:;	genIfx;	genIfxJump;	Peephole 108.d	removed ljmp by inverse jump logic	jnb	_RI,00101$;	Peephole 300	removed redundant label 00108$;	echo.c:27: return SBUF;;	genAssign	mov	dpl,_SBUF;	genRet;	Peephole 300	removed redundant label 00104$	ret;------------------------------------------------------------;Allocation info for local variables in function 'main';------------------------------------------------------------;c                         Allocated to registers r2 ;------------------------------------------------------------;	echo.c:30: void main();	-----------------------------------------;	 function main;	-----------------------------------------_main:;	echo.c:32: uart_init();;	genCall	lcall	_uart_init;	echo.c:33: EA = 0;;	genAssign	clr	_EA;	echo.c:34: while(1) {00102$:;	echo.c:36: P1_0 ^= 1;;	genXor	cpl	_P1_0;	echo.c:37: c = getchar();;	genCall	lcall	_getchar;	echo.c:38: P0 = c;;	genAssign;	echo.c:39: putchar(c);;	genCall	mov	r2,dpl	mov	_P0,r2;	Peephole 166	removed redundant mov	lcall	_putchar;	Peephole 112.b	changed ljmp to sjmp	sjmp	00102$;	Peephole 259.a	removed redundant label 00104$ and ret;	.area CSEG    (CODE)	.area CONST   (CODE)	.area XINIT   (CODE)