//###########################################################################
// FILE:	Example_280xHiResPWM.c

// TITLE:	DSP280x Device HRPWM example 
// DESCRIPTION:
//
//       This example modifies the MEP control registers to show edge displacement
//       due to the HRPWM control extension of the respective ePWM module
//       All ePWM1A,2A,3A,4A channels (GPIO0, GPIO2, GPIO4, GPIO6) will have fine edge movement 
//       due to HRPWM logic
//
//            1. 10MHz PWM, ePWM1A toggle low/high with MEP control on Rising edge
//               10MHz PWM, ePWM1B toggle low/high with NO HRPWM control
//
//            2. 6MHz PWM, ePWM2A toggle low/high with MEP control on Rising edge
//               6MHz PWM, ePWM2B toggle low/high with NO HRPWM control
//             
//            3. 3MHz PWM, ePWM3A toggle as high/low with MEP control on Rising edge
//               3MHz PWM, ePWM3B toggle low/high with NO HRPWM control

//###########################################################################

#include "DSP280x_Device.h"     	// DSP280x Headerfile
#include "DSP280x_EPwm_defines.h" 	// useful defines for initialization


// Declare your function prototypes here
//---------------------------------------------------------------

void HRPWM1_Config(int);
void HRPWM2_Config(int);
void HRPWM3_Config(int);

// General System nets - Useful for debug
Uint16 i,j,	duty, DutyFine, n,update;	

Uint32 temp;

void main(void)
{

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP280x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO: 
// This example function is found in the DSP280x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();  // Skipped for this example  
// For this case, just init GPIO for ePWM1-ePWM4

// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3, ePWM4
// These functions are in the DSP280x_EPwm.c file
   InitEPwm1Gpio();
   InitEPwm2Gpio();
   InitEPwm3Gpio(); 
   

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts 
   DINT;

// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.  
// This function is found in the DSP280x_PieCtrl.c file.
   InitPieCtrl();
   
// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;
		    
// Initialize the PIE vector table with pointers to the shell Interrupt 
// Service Routines (ISR).  
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP280x_DefaultIsr.c.
// This function is found in DSP280x_PieVect.c.
   InitPieVectTable();

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP280x_InitPeripherals.c
// InitPeripherals();  // Not required for this example

// For this example, only initialize the ePWM
// Step 5. User specific code, enable interrupts:

   update =1;
   DutyFine =0;

   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
   EDIS;

// Some useful Period vs Frequency values for SYSCLKOUT = 60MHz
//	Period	Frequency
//	1000	60 KHz
//	800		75 KHz
//	600		100 KHz
//	500		120 KHz
//	250		240 KHz
//	200		300 KHz
//  100     600 KHz
//	60		1 MHz
//	50		1.2 MHz
//	25		2.4 MHz
//	20		3 MHz
//	12		5 MHz
//	10		6 MHz
//	9		6.7 MHz
//	8		7.5 MHz
//	7		8.6 MHz
//	6		10 MHz
//	5		12 MHz


//====================================================================
// ePWM and HRPWM register initializaition
//====================================================================
   HRPWM1_Config(60);	    // ePWM1 target, 1 MHz PWM
   HRPWM2_Config(100);	    // ePWM2 target, 600 KHz PWM
   HRPWM3_Config(200);	    // ePWM3 target, 300 KHz PWM
  
   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
   EDIS;

   while (update ==1)
    
	{
	
       for(DutyFine =1; DutyFine <256 ;DutyFine ++)
        {
		
        // Example, write to the HiRes extension of CMPA
        EPwm1Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
        EPwm2Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
 
        // Example, 32-bit write to CMPA:CMPAHR
        EPwm3Regs.CMPA.all = ((Uint32)EPwm3Regs.CMPA.half.CMP_A << 16) + (DutyFine << 8);
        EPwm4Regs.CMPA.all = ((Uint32)EPwm4Regs.CMPA.half.CMP_A << 16) + (DutyFine << 8);
        
		for (i=0;i<10000;i++){}                         // Dummy delay between MEP changes
		}
	}
	
} 


void HRPWM1_Config(period)
{
// ePWM1 register configuration with HRPWM
// ePWM1A toggle low/high with MEP control on Rising edge

	EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
	EPwm1Regs.TBPRD = period;		                    // PWM frequency = 1 / period
	EPwm1Regs.CMPA.half.CMP_A = period / 2;              // set duty 50% initially
    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HiRes extension
	EPwm1Regs.CMPB = period / 2;	                    // set duty 50% initially
	EPwm1Regs.TBPHS.all = 0;
	EPwm1Regs.TBCTR = 0;

	EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
	EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;		       // EPWM1 is the Master
	EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
	EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
	EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

	EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
	EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
	EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
	EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
	
	EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;               // PWM toggle low/high
	EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
	EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
	EPwm1Regs.AQCTLB.bit.CBU = AQ_SET; 

	EALLOW;		
	EPwm1Regs.HRCNFG.all = 0x0;	
	EPwm1Regs.HRCNFG.bit.EDGMODE = HR_REP;				//MEP control on Rising edge
	EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;
	EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
	EDIS;	
}

void HRPWM2_Config(period)
{	
// ePWM2 register configuration with HRPWM
// ePWM2A toggle low/high with MEP control on Rising edge

	EPwm2Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
	EPwm2Regs.TBPRD = period;		                    // PWM frequency = 1 / period
	EPwm2Regs.CMPA.half.CMP_A = period / 2;              // set duty 50% initially
    EPwm2Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HiRes extension
	EPwm2Regs.CMPB = period / 2;	                    // set duty 50% initially
	EPwm2Regs.TBPHS.all = 0;
	EPwm2Regs.TBCTR = 0;

	EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
	EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;		         // ePWM2 is the Master
	EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
	EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
	EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;

	EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
	EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
	EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
	EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
	
	EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;                  // PWM toggle low/high
	EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
	EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
	EPwm2Regs.AQCTLB.bit.CBU = AQ_SET; 

	EALLOW;		
	EPwm2Regs.HRCNFG.all = 0x0;	
	EPwm2Regs.HRCNFG.bit.EDGMODE = HR_REP;                //MEP control on Rising edge
	EPwm2Regs.HRCNFG.bit.CTLMODE = HR_CMP;
	EPwm2Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
	
	EDIS;	

}	
void HRPWM3_Config(period)
{	
// ePWM3 register configuration with HRPWM
// ePWM3A toggle high/low with MEP control on falling edge
	
	EPwm3Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
	EPwm3Regs.TBPRD = period;		                    // PWM frequency = 1 / period
	EPwm3Regs.CMPA.half.CMP_A = period / 2;              // set duty 50% initially
    EPwm3Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HiRes extension
	EPwm3Regs.CMPB = period / 2;	                    // set duty 50% initially
	EPwm3Regs.TBPHS.all = 0;
	EPwm3Regs.TBCTR = 0;

	EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
	EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;		         // ePWM2 is the Master
	EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
	EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
	EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;

	EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
	EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
	EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
	EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
	
	EPwm3Regs.AQCTLA.bit.ZRO = AQ_CLEAR;                  // PWM toggle low/high
	EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;
	EPwm3Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
	EPwm3Regs.AQCTLB.bit.CBU = AQ_SET; 

	EALLOW;		
	EPwm3Regs.HRCNFG.all = 0x0;	
	EPwm3Regs.HRCNFG.bit.EDGMODE = HR_REP;                //MEP control on Rising edge
	EPwm3Regs.HRCNFG.bit.CTLMODE = HR_CMP;
	EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;	
	EDIS;
}