//////////////////////////////////////////////////////////////////////////                                                              ////////  8051 alu carry select module                                ////////                                                              ////////  This file is part of the 8051 cores project                 ////////  http://www.opencores.org/cores/8051/                        ////////                                                              ////////  Description                                                 ////////   Multiplexer wiht whitch we select carry in alu             ////////                                                              ////////  To Do:                                                      ////////   nothing                                                    ////////                                                              ////////  Author(s):                                                  ////////      - Simon Teran, simont@opencores.org                     ////////                                                              //////////////////////////////////////////////////////////////////////////////                                                              //////// Copyright (C) 2000 Authors and OPENCORES.ORG                 ////////                                                              //////// This source file may be used and distributed without         //////// restriction provided that this copyright statement is not    //////// removed from the file and that any derivative work contains  //////// the original copyright notice and the associated disclaimer. ////////                                                              //////// This source file is free software; you can redistribute it   //////// and/or modify it under the terms of the GNU Lesser General   //////// Public License as published by the Free Software Foundation; //////// either version 2.1 of the License, or (at your option) any   //////// later version.                                               ////////                                                              //////// This source is distributed in the hope that it will be       //////// useful, but WITHOUT ANY WARRANTY; without even the implied   //////// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //////// PURPOSE.  See the GNU Lesser General Public License for more //////// details.                                                     ////////                                                              //////// You should have received a copy of the GNU Lesser General    //////// Public License along with this source; if not, download it   //////// from http://www.opencores.org/lgpl.shtml                     ////////                                                              ////////////////////////////////////////////////////////////////////////////// ver: 1//module cy_select (cy_sel, cy_in, data_in, data_out);// cy_sel       carry select, from decoder (see defines.v)// cy_in        carry input (psw[7])// data_in      data input (ram_select1)// data_out     data output (to alu)input [1:0] cy_sel;input cy_in, data_in;output data_out;reg data_out;always @(cy_sel or cy_in or data_in)begin  case (cy_sel)    `CY_0: data_out = 1'b0;    `CY_PSW: data_out = cy_in;    `CY_RAM: data_out = data_in;    `CY_1: data_out = 1'b1;    default: data_out = 1'bx;  endcaseendendmodule