//init_sender.c
//
// Project Red 2002: High Performance OFDM Modem 
// Against Channel Imperfections
// Auther: Linus Falk

/* This program configures and initializes the codec, McBSP and the DMA	*/
/*                                                                      */
/* Functions:															*/
/* enableCodec()	- Initialize and configure Codec                    */
/* enableMcBSP0()	- Initialize and configure McBSP 0 					*/
/* enableDMA()		- Initialize and configure DMA 				        */
/* set_interrupt()	- Set up interrupts 								*/
/* c_int08()		- Interrup service routine for DMA Ch0 				*/
/* signal_process()	- Performs signal processing functions on the 		*/
/*					  in_signal and the processed signal is copied to	*/
/*					  the out_signal									*/
/*																		*/ 
/* -------------------------------------------------------------------- */
/* -------------------------------------------------------------------- */
/* Includes header files												*/
/* -------------------------------------------------------------------- */
#include "ofdm.h"
#include "fft.h"
#include "run_sender.h"

#define	FRAME_SIZE		1				/* There is one frame in each block transfer */
#define ELEMENT_SIZE	(BUFFER_SIZE+PREFIX_LENGTH+GUARD_LENGTH)		/* A total of 'BUFFER_SIZE + PREFIX_LENGTH' elements per frame */

/* McBSP 0 Memory Mapped Registers */
#define DRR  (*(volatile unsigned int *)0x018c0000) /* Data Receive Reg */
#define DXR  (*(volatile unsigned int *)0x018c0004) /* Data Transmit Reg */
#define SPCR (*(volatile unsigned int *)0x018c0008) /* Serial Port Cont Reg */
#define RCR  (*(volatile unsigned int *)0x018c000c) /* Receive Control Reg */
#define XCR  (*(volatile unsigned int *)0x018c0010) /* Transmit Control Reg */
#define MCR  (*(volatile unsigned int *)0x018c0018) /* Multichannel Reg */
#define PCR  (*(volatile unsigned int *)0x018c0024) /* Pin Control Reg */

/* McBSP 0 Commands */
#define SPCR_DISABLE   0x00        /* Disable serial port */
#define SPCR_STANDBY   0x00200020  /* Wait for frame synch, enable RX int */
#define SPCR_ENABLE    0x00010001  /* Enable serial port */
#define PCR_SET        0x00        /* External RX/TX clock and frame synch */
#define CR_32_SET      0x000000a0  /* 32 bit word, 1 w/frame, single phase */
#define CR_16_SET      0x00000140  /* 16 bit word, 16 bits/frame, single phase */
#define MCR_SET        0x00        /* Enable TX and RX channels */

/* -------------------------------------------------------------------- */
/* Function prototypes													*/
/* -------------------------------------------------------------------- */
static void enableCodec(void);  		
static void enableMcBSP0(void); 		
static void enableDMA(void);			
static void set_interrupt(void);		
interrupt void isr_build_frame(void);           

/* -------------------------------------------------------------------- */
/* Function																*/
/* -------------------------------------------------------------------- */
#pragma CODE_SECTION(init_sender,"SBSRAM_PROG_MEM");
void init_sender(void)
{
	/* Initializes the EVM board [2]-3.5 */
 	if (evm_init())
 	{
 		//puts("Error returned from evm_init()");
 		exit(EXIT_FAILURE);
 	}
	
	//init fft
	init_fft();
	
	/* Globally disable all masked interrupts [4]-4 */
	INTR_GLOBAL_DISABLE();
	
    /* Configure codec */
    enableCodec();
    
    /* Configure McBSP 0 */
    enableMcBSP0();
    
    /* Configure DMA */
    enableDMA();
    
    /* Calibrate the codec */
    if (!codec_calibrate(FULL_CAL))
    {
    	// calibrate failed
    }
    
    /* Unmute left and right DAC-to-mixer */
    /* Control the output digital-to-analog converters */
  	if (codec_dac_control(LEFT, 0.0, FALSE))
	{
		puts("codec_dac_control operation failed");
		exit(EXIT_FAILURE);
	}
	if (codec_dac_control(RIGHT, 0.0, FALSE))
	{
		puts("codec_dac_control operation failed");
		exit(EXIT_FAILURE);
	}
	
	/* Start DMA Ch2 Transfer */
    //DMA_AUTO_START(DMA_CH2);

    /* Enable serial port */
    SPCR = SPCR_ENABLE;
    
    //init Mailbox
    pci_driver_init();
    
    //init get data from host
    //init_get_data_dummy(); //dummy interface
    init_get_data();	//real interface
    
    //init_bitload
    init_bitload();
}     

/* ======== enableCodec ======== */
#pragma CODE_SECTION(enableCodec,"SBSRAM_PROG_MEM");
static void enableCodec(void)
{
	/* Connect codec to McBSP */
	if (evm_codec_enable())
	{
		//puts("evm_codec_enable operation failed");
		exit(EXIT_FAILURE);
	}
    
    /* Perform required codec initialization and default configuration */
	if (codec_init())
	{
		//puts("codec_init operation failed");
		exit(EXIT_FAILURE);
	}
	
    /* Mic input or Line input */
	if (MIC_SELECT)
	{
		/* Set input analog-to-digital converters to							*/
		/* A/D 0.0 dB gain, turn on 20 dB mic gain, select (L/R)MIC as inputs	*/
		if (codec_adc_control(LEFT, 0.0, TRUE, MIC_SEL))
		{
			//puts("codec_adc_control operation failed");
			exit(EXIT_FAILURE);
		}
		if (codec_adc_control(RIGHT, 0.0, TRUE, MIC_SEL))
		{
			//puts("codec_adc_control operation failed");
			exit(EXIT_FAILURE);
		}
	}
	else
	{
		/* Set input analog-to-digital converters to							*/
		/* A/D 0.0 dB gain, turn off 20 dB mic gain, select (L/R)LINE as inputs */
		if (codec_adc_control(LEFT, 0.0, FALSE, LINE_SEL))
		{
			//puts("codec_adc_control operation failed");
			exit(EXIT_FAILURE);
		}
		if (codec_adc_control(RIGHT, 0.0, FALSE, LINE_SEL))
		{
			//puts("codec_adc_control operation failed");
			exit(EXIT_FAILURE);
		}
		
		/* Mute (L/R) LINE input to mixer