comment setreg @CP15_CONTROL=0x00050078
comment  configuring CP15 for enabling the pripheral bus
comment setreg @CP15_PERIP_MEM_REMAP=0x40000015

comment wait = on
comment *=====================================================
comment  init_ccm
comment *=====================================================

comment #################
comment # AHB-Lite IP Interface
setmem 0x10000000 0x20040304 32
setmem 0x10020000 0x00000000 32
setmem 0x10000004 0xDFFBFCFB 32
setmem 0x10020004 0xFFFFFFFF 32

comment ########################
comment # INIT CLK
setmem 0x10027000 0x33f00307 32
setmem 0x10027818 0x00060f08 32

comment setmem 0x10027020 0xFFFFFFFF 32
comment setmem 0x10027024 0xFFFFFFFC 32

comment 532-133-66.5
comment setmem /32 0x53F80004 = 0xFF871D58
comment setmem /32 0x53F80010 = 0x0033280C

comment  399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40
comment setmem /32 0x53F80004 = 0xFF871D50
comment setmem /32 0x53F80010 = 0x00271C1B

comment  208-104-52
comment setmem /32 0x53F80004 = 0xFF871D48
comment setmem /32 0x53F80010 = 0x04002000

comment *======================================================
comment   WEIM WCR REGISTER
comment *======================================================
setmem 0xd8002060  0x00001000 32

comment *======================================================
comment  Configure PSRAM on CS5 
comment *======================================================
setmem 0xd8002050 0x0000dcf6 32
setmem 0xd8002054 0x444a4541 32
setmem 0xd8002058 0x44443302 32
comment setmem 0xB6000000 =0xCAFECAFE 

comment   =====================================================
comment         Start 16 bit NorFlash Initialization on CS0
comment   =====================================================
setmem 0xd8002000 0x0000CC03 32
setmem 0xd8002004 0xa0330D01 32
setmem 0xd8002008 0x00220800 32

comment *=======================================================
comment  Configure CPLD on CS4 
comment *=======================================================

comment setmem 0x10015520 0x00200000 32
comment setmem 0x10015500 0x00200000 32
comment setmem 0x10015508 0x00000c00 32
comment setmem 0x1001551c 0x00000000 32

setmem 0xd8002040 0x0000DCF6 32
setmem 0xd8002044 0x444A4541 32
setmem 0xd8002048 0x44443302 32

comment *=======================================================
comment  Configure DDR on CSD0 
comment *=======================================================
setmem 0xD8001010 0x00000008 32
setmem 0x10027828 0x55555555 32
setmem 0x10027830 0x55555555 32
setmem 0x10027834 0x55555555 32
setmem 0x10027838 0x00005005 32
setmem 0x1002783C 0x15555555 32
setmem 0xD8001010 0x00000004 32
setmem 0xD8001004 0x006AD42A 32
setmem 0xD8001000 0x92200000 32
mem    0xA0000F00 +4	     32
setmem 0xD8001000 0xA2200000 32
mem    0xA0000000 +4	     32
mem    0xA0000000 +4	     32
setmem 0xD8001000 0xB2200000 32
mem    0xA0000033 +1	     8
mem    0xA1000000 +1	     8
setmem 0xD8001000 0x82224405 32


comment *=======================================================
comment  Configure LCDC  
comment *=======================================================

comment *** LCDC on by CPLD GPIO Enable  ***
comment * ============================== ***

setmem 0xD4000004 0x0814 16

comment ** progame GPIO PIN to act as LCD pin   **
comment *  progame the GPIOA_GIUS and GPIOA_GPR  *
comment * ====================================== **

setmem 0x10015020 0x00000000 32
setmem 0x10015038 0x00000000 32

comment ** strong the LCD PIN drive      **
comment *  progame the bits 0,1 in DSCR1  *
comment * =============================== *

setmem 0x10027820 0x000000001 32

comment ** progame LSSAR **
comment * =============== *

setmem 0x10021000 0xA0010000 32


comment ** progame LSR **

comment // set bus size is 64bits, 240x320//

setmem 0x10021004 0x00F00140 32

comment //set the bus size is 32bits,240x320//

comment setmem 0x10021004 0x10F00140 32

setmem 0x10021008 0x00000078 32

comment ** progame LPCR **

setmem 0x10021018 0xFB128BCC 32

setmem 0x1002101C 0x04000F06 32

setmem 0x10021020 0x04000907 32

comment ** progame curse **

setmem 0x1002100C 0x40010001 32
setmem 0x10021010 0x1F1F0000 32
setmem 0x10021014 0x0000F800 32

setmem 0x10021028 0x00120300 32

comment ** setup PWM for background light **
setmem 0x1002102C 0x00A9030F 32 

setmem 0x10021030 0x00080008 32
setmem 0x10021034 0x00000000 32

comment ** setup Graphic Window Registers **
comment ** in the init file, will not include the Graphic window register setup **

comment ** enable the LCDC clock **

setmem 0x10027020 0xFFFFFFFF 32
setmem 0x10027024 0xFFFFFFFC 32