;;; Copyright ARM Ltd 1999. All rights reserved.

        AREA VRAM_Vect, CODE, READONLY

; These are example exception vectors and exception handlers

; Where there is ROM fixed at 0x0 (build_b & build_c), these are hard-coded at 0x0.
; Where ROM/RAM remapping occurs (build_d), these are copied from ROM to RAM.
; The copying is done automatically by the C library code inside __main.

; *****************
; Exception Vectors
; *****************

; Note: LDR PC instructions are used here because branch (B) instructions
; could not simply be copied (the branch offsets would be wrong).  Also,
; a branch instruction might not reach if the ROM is at an address >32MB).

        ENTRY
        
		IMPORT	C_Undefined_Handler
        IMPORT	C_SWI_Handler
        IMPORT	C_Prefetch_Handler
        IMPORT	C_Abort_Handler
        IMPORT	C_IRQ_Handler
        IMPORT	C_FIQ_Handler

VRAM_Undefined_Addr  DCD     C_Undefined_Handler
VRAM_SWI_Addr        DCD     C_SWI_Handler
VRAM_Prefetch_Addr   DCD     C_Prefetch_Handler
VRAM_Abort_Addr      DCD     C_Abort_Handler        
VRAM_IRQ_Addr        DCD     C_IRQ_Handler
VRAM_FIQ_Addr        DCD     C_FIQ_Handler


; ************************
; Exception Handlers
; ************************

; The following dummy handlers do not do anything useful in this example.
; They are set up here for completeness.

        
        END