/* 10.bit pack mode(10BPK bit) in this 8.bit example */
	/* No (1/2) scaling and no chroma re.sampling in this example */
	/*初始化EDMA通路*/
	IRQ_enable(IRQ_EVT_VINT1);
	/* Enable video port interrupts */
	IRQ_enable(vpCaptureHandle->eventId);
	/* Setup Y, Cb and Cr EDMA channels */
	setupVPCapChaAEDMA(portNumber);
	/* Clear VPHLT in VP_CTL to make video port function，清除VPHLT位?
	   使能其它位 */
	VP_FSETH(vpCaptureHandle, VPCTL, VPHLT, VP_VPCTL_VPHLT_CLEAR);
	/* .............. */
	/* enable capture */
	/* .............. */
	/* set VCEN bit to enable capture，使能VCA口 */
	VP_FSETH(vpCaptureHandle, VCACTL, VCEN, VP_VCACTL_VCEN_ENABLE);
	/* clear BLKCAP in VCA_CTL to enable capture DMA events */
	VP_FSETH(vpCaptureHandle, VCACTL, BLKCAP,VP_VCACTL_BLKCAP_CLEAR);
	
	return (vpCaptureHandle);
}
/*******************************************************************/
/* Function : bt656_capture_start    							   */
/* Input(s) : VP_handle									           */
/* Description : Configures given video port for 8.bit BT.656 non. */
/* continuos frame capture on channel A.                           */
/*******************************************************************/
void bt656_capture_start(VP_Handle videoHandle)
{	
}
/*................................................................ */
/* Function : VPCapChaAIsr */
/* Description : This capture ISR clears FRMC to continue capture */
/* in this non.continuous mode and also clears other */
/* status bits. */
/*................................................................ */
interrupt void VPCapChaAIsr(void)
{
	Uint32 vpis = 0;
	/* Get video port status register value */
	vpis = VP_RGETH(vpCaptureHandle, VPIS);
	if(vpis & _VP_VPIS_CCMPA_MASK) /* capture complete */
	{
		/* Clear frame complete bit in VCX_CTL to continue capture in non.continuous mode*/
		VP_FSETH(vpCaptureHandle, VCASTAT, FRMC,VP_VCASTAT_FRMC_CLEAR);
		/* Clear CCMPA to enable next frame complete interrupts*/
		VP_FSETH(vpCaptureHandle, VPIS, CCMPA,VP_VPIS_CCMPA_CLEAR);
		capChaAFrameCount++; /* increment captured frame count */
	}
	if(vpis & _VP_VPIS_COVRA_MASK) /* overrun error */
	{
		capChaAOverrun++;
		VP_FSETH(vpCaptureHandle, VPIS, COVRA,VP_VPIS_COVRA_CLEAR);
	}
	if(vpis & _VP_VPIS_SERRA_MASK) /* synchronization error */
	{
		capChaASyncError++;
		VP_FSETH(vpCaptureHandle, VPIS, SERRA,VP_VPIS_SERRA_CLEAR);
	}
	if(vpis & _VP_VPIS_SFDA_MASK) /* short field detect */
	{
		capChaAShortFieldDetect++;
		VP_FSETH(vpCaptureHandle, VPIS, SFDA, VP_VPIS_SFDA_CLEAR);
	}
	if(vpis & _VP_VPIS_LFDA_MASK) /* long field detect */
	{
		capChaALongFieldDetect++;
		VP_FSETH(vpCaptureHandle, VPIS, LFDA, VP_VPIS_LFDA_CLEAR);
	}
}
/*................................................................ */
/* Function : setupVPCapChaAEDMA(Int32 portNumber) */
/* Input(s) : portNumber, video port number i.e. 0, 1 or 2. */
/* Description : Sets up EDMA channels for Y, U, V events for */
/* channel A capture. */
/*功能描述：將為Y，U，V建立EDMA的通路*/
/*................................................................ */
void setupVPCapChaAEDMA(int portNumber)
{
	Int32 YEvent, UEvent, VEvent;
	/* get channelA Y, U, V EDMA event numbers，選擇觸發事件 */
	switch(portNumber)
	{
		/*確定相應的DMA通路*/
		case VP_DEV0: 
			YEvent = EDMA_CHA_VP0EVTYA;
			UEvent = EDMA_CHA_VP0EVTUA;
			VEvent = EDMA_CHA_VP0EVTVA;
			break;
		case VP_DEV1: 
			YEvent = EDMA_CHA_VP1EVTYA;
			UEvent = EDMA_CHA_VP1EVTUA;
			VEvent = EDMA_CHA_VP1EVTVA;
			break;
		case VP_DEV2: 
			YEvent = EDMA_CHA_VP2EVTYA;
			UEvent = EDMA_CHA_VP2EVTUA;
			VEvent = EDMA_CHA_VP2EVTVA;
			break;
	}
	/* Configure Y EDMA channel to move data from YSRCA */
	/* (FIFO) to Y.data buffer, capChaAYSpace */
	configVPCapEDMAChannel( &hEdmaVPCapChaAY, YEvent,
							&edmaCapChaAYTccNum,
							vpCaptureHandle->ysrcaAddr,
							(Uint32)capChaAYSpace,
							VCA_Y_EDMA_FRMCNT,
							VCA_Y_EDMA_ELECNT);
	/* Configure Cb EDMA channel to move data from CbSRCA */
	/* (FIFO) to Cb.data buffer, capChaACbSpace */
	configVPCapEDMAChannel( &hEdmaVPCapChaACb, UEvent,
							&edmaCapChaACbTccNum,
							vpCaptureHandle->cbsrcaAddr,
							(Uint32)capChaACbSpace,
							VCA_Y_EDMA_FRMCNT,
							VCA_Y_EDMA_ELECNT/2); /* (1/2) of Y.samples */
	/* Configure Cr EDMA channel to move data from CrSRCA */
	/* (FIFO) to Cr.data buffer, capChaACrSpace */
	configVPCapEDMAChannel( &hEdmaVPCapChaACr, VEvent,
							&edmaCapChaACrTccNum,
							vpCaptureHandle->crsrcaAddr,
							(Uint32)capChaACrSpace,
							VCA_Y_EDMA_FRMCNT,
							VCA_Y_EDMA_ELECNT/2); /* (1/2) of Y.samples */
	/* Enable three EDMA channels */
	EDMA_enableChannel(hEdmaVPCapChaAY);
	EDMA_enableChannel(hEdmaVPCapChaACb);
	EDMA_enableChannel(hEdmaVPCapChaACr);
}
/*................................................................ */
/* Function : configVPCapEDMAChannel */
/* */
/* Input(s) : edmaHandle . pointer to EDMA handle. */
/* eventId . EDMA eventId. */
/* tccNum . pointer to transfer complete number. */
/* srcAddr . source address for EDMA transfer. */
/* dstAddr . destination address for EDMA transfer */
/* frameCount . frame count. */
/* elementCount . element count(32.bit element size). */
/* */
/* Output(s): edmaHandle . edma Handle of the given event. */
/* tccNum . transfer complete code for the given */
/* event. */
/* */
/* Description : Configures the given VP capture EDMA channel. */
/* The source address update is fixed address mode */
/* because the captured data is read from the FIFO. */
/* In this example, the destination address mode is */
/* auto.increment. But, in real.time applications */
/* there is lot of flexibility in the way capture */
/* buffers can be managed like ping.pong and round */
/* robin,…etc. */
/*................................................................ */
void configVPCapEDMAChannel(EDMA_Handle *edmaHandle, 
							Int32 eventId,
							Int32 *tccNum, 
							Uint32 srcAddr,
							Uint32 dstAddr, 
							Uint32 frameCount,
							Uint32 elementCount)
{
	Int32 tcc = 0;
	/* Open Y EVT EDMA channel */
	*edmaHandle = EDMA_open(eventId, EDMA_OPEN_RESET);
	if(*edmaHandle == EDMA_HINV)
	{
		for(;;){}
	}	
	/* allocate TCC for Y event */
	if((tcc = EDMA_intAlloc(-1)) == -1)
	{
		for(;;){}
	}
	/* Configure EDMA parameters */
	EDMA_configArgs(
		*edmaHandle,
		EDMA_OPT_RMK(EDMA_OPT_PRI_MEDIUM, /* medium priority 設置優先級為中*/
					 EDMA_OPT_ESIZE_32BIT, /* Element size 32 bits 元素的長度為4個Byte*/
					 EDMA_OPT_2DS_NO, /* 1.dimensional source(FIFO) 源采用固定的方試*/
					 EDMA_OPT_SUM_NONE, /* fixed src address mode(FIFO) 源地址不變*/
					 EDMA_OPT_2DD_YES, /* 2.dimensional destination 目的采用2維空間的組成*/
					 EDMA_OPT_DUM_INC, /* destination increment 目的采用增長的方式*/
					 EDMA_OPT_TCINT_YES, /* Enable transfer complete indication，使能傳送結束指示*/
					 EDMA_OPT_TCC_OF(tcc & 0xF),/*設置完成標志CIP0的低位*/
					 EDMA_OPT_TCCM_OF(((tcc & 0x30) >> 4)),/*設置完成標志CIP0的高位*/
					 EDMA_OPT_ATCINT_NO, /* Disable Alternate Transfers 禁止交替傳送 */
					 EDMA_OPT_ATCC_OF(0),/* Complete Interrupt 未使用交替完標志 */
					 EDMA_OPT_PDTS_DISABLE, /* disable PDT(peripheral device transfer) mode for source */
					 EDMA_OPT_PDTD_DISABLE, /* disable PDT mode for dest */
					 EDMA_OPT_LINK_NO, /* Disable linking */
					 EDMA_OPT_FS_NO), /* Array synchronization 陣列同步*/
		EDMA_SRC_RMK(srcAddr),/*源地址*/
		EDMA_CNT_RMK(EDMA_CNT_FRMCNT_OF((frameCount-1)),/*陳列的行數*/
		EDMA_CNT_ELECNT_OF(elementCount)),/*每行的像素數*/
		EDMA_DST_RMK(dstAddr),/*目的地址*/
		EDMA_IDX_RMK(EDMA_IDX_FRMIDX_OF((elementCount * 4)),/*每行的增量*/
		         	 EDMA_IDX_ELEIDX_OF(0)), /* note: 32.bit element size */
		/* no RLD in 2D and no linking */
		EDMA_RLD_RMK(EDMA_RLD_ELERLD_OF(0), EDMA_RLD_LINK_OF(0))
	);
	*tccNum = tcc;/*返回中斷完成標志*/
}