/*******************************************************************************
*
*  File name:              zl5011xCpqMap.h
*
*  Version:                14
*
*  Author:                 LCW
*
*  Date created:           11/04/2002
*
*  Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
*  All rights reserved.
*
*  Module Description:
*   This is the map header file for the CPQ block.
*   It contains address ofsets and general constants for the CPQ module.
*
*  Revision History:
*
*  Rev:  Date:       Author:  Comments:
*  1     11/04/2002  LCW      First issue
*  2     16/04/2002  MRC      Changed Authur to Author
*  3     19/04/2002  LCW      Prepared for code review
*  4     26/04/2002  LCW      Prepared for code review
*  5     15/04/2002  LCW      Minor mods.
*  6     01/05/2002  LCW      Minor mods.
*  7     12/06/2002  MRC      Update.
*  8     19/09/2002  MRC      Tidied up register addresses
*  9     30/09/2002  PJE      small correctn to status mask
*  10    18/10/2002  PJE      interruptEnable/Disable updated
*  11    31/10/2002  MRC      Added variants + minor fixes
*  12    07/04/2003  ARW      Added a macro from CPU map file
*  13    07/04/2003  ARW      Added a macro for enable thresold drops
*  14    14/02/2005  MRC      Updated compiler directive
*
*******************************************************************************/

#ifndef _ZL5011X_CPQ_MAP_H
#define _ZL5011X_CPQ_MAP_H

#ifdef __cplusplus
extern "C" {
#endif

/*****************   DATA TYPES   *********************************************/

/*****************   # DEFINES   **********************************************/
/* Register address offsets */
#define ZL5011X_CPQ_OVERFLOW                ZL5011X_CPQ_BASE + 0x00
#define ZL5011X_CPQ_SIZE                    ZL5011X_CPQ_BASE + 0x10
#define ZL5011X_CPQ_TAIL_POINTER            ZL5011X_CPQ_BASE + 0x20
#define ZL5011X_CPQ_HEAD_POINTER            ZL5011X_CPQ_BASE + 0x30
#define ZL5011X_CPQ_PACKET_COUNT            ZL5011X_CPQ_BASE + 0x40
#define ZL5011X_CPQ_STATUS                  ZL5011X_CPQ_BASE + 0x50
#define ZL5011X_CPQ_CONTROL                 ZL5011X_CPQ_BASE + 0x54
#define ZL5011X_CPQ_MAX_QUEUE_SIZE          ZL5011X_CPQ_BASE + 0x58

/* bit field positions / masks */
#define ZL5011X_CPQ_STATUS_MASK_CHECK       0x000001FF
#define ZL5011X_CPQ_OVERRUN_THLD_CHECK      0x0003FFFF
#define ZL5011X_CPQ_MAX_NUM_GRANULES_CHECK  0x000FFFFF
#define ZL5011X_CPQ_MAX_PACKET_COUNT_CHECK  0x0003FFFF

/* CPQ status register bits                                                   */
#define ZL5011X_QUEUE_NOT_EMPTY_SHIFT  5

/* bit positions of Interrupt Enable bits in CPQ Control Reg. */
#define ZL5011X_CPQ_THRES_MASK0 0 /* queue zero overflow intr enable */
#define ZL5011X_CPQ_RDY_MASK0 5  /* queue zero started intr enable */
#define ZL5011X_CPQ_ENABLE_THRES_DROP0 9 /* queue zero thresolh enable bit */
#define ZL5011X_CPQ_ENABLE_THRES_INTRS (ZL5011X_4BIT_MASK<<ZL5011X_CPQ_THRES_MASK0)
#define ZL5011X_CPQ_ENABLE_RDY_INTRS (ZL5011X_4BIT_MASK<<ZL5011X_CPQ_RDY_MASK0)
#define ZL5011X_CPQ_ENABLE_ALL_INTRS (ZL5011X_CPQ_ENABLE_THRES_INTRS | \
                                    ZL5011X_CPQ_ENABLE_RDY_INTRS)

#ifdef __cplusplus
}
#endif

#endif /* _ZL5011X_CPQMAP_H_ */