/*******************************************************************************
*
*  File name:              zl5011xInterrupts.h
*
*  Version:                33
*
*  Author:                 PJE
*
*  Date created:           17/07/2002
*
*  Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
*  All rights reserved.
*
*  Module Description:
*     This is header file for the high level ISR functions.
*
*
*  Revision History:
*
*  Rev:  Date:       Author:  Comments:
*  0     17/07/2002  PJE      first fns.- enable/disable - tested OK
*  1     18/07/2002  PJE      after first review
*  2     30/07/2002  PJE      added freeze fns.
*  4     09/08/2002  PJE      compiles Ok but no AddDevice yet
*  5     14/08/2002  PJE      compiles Ok but no zl5011xIsrConnectApi yet
*  6     14/08/2002  PJE      corrected CPQ register values
*  7     28/08/2002  PJE      First clear the interrupts before enabling.
*  8     05/09/2002  PJE      debugging IsrTask
*  9     06/09/2002  PJE      debugging IsrInitialise and reorganising after review
*  10    26/09/2002  PJE      new zl5011xIsrNoAppnInterruptSoFar() & zl5011xIsrNoApi..
*  11    27/09/2002  PJE      debugging IsrHandler & IsrCompose
*  12    02/10/2002  PJE      new IsrApiHandler
*  13    04/10/2002  PJE      new fns zl5011xIsrEnableApiInterrupts & Disable...
*  14    10/10/2002  PJE      new fns
*  15    16/10/2002  PJE      improvements to ApiHandler
*  16    24/10/2002  PJE      API tidy up & peer rev actions
*  17    31/10/2002  MRC      Added variants + minor fixes
*  18    18/11/2002  PJE      added CET ISR fns.
*  19    22/11/2002  PJE      debug // comments
*  20    09/01/2003  MRC      Renamed fns zl5011xIsrIsRunning &
*                             zl5011xIsrSetCetQueueid
*  21    17/02/2003  MRC      Fixed typo on enable/disable fn StructInits
*  22    18/02/2003  PJE      set INTERRUPT_VECTOR_APPN to    PPC8260_IRQ3
*  23    20/03/2003  JG       update
*  24    03/04/2003  MRC      Renamed variables to comply with global namespace
*                             requirements
*  25    10/04/2003  MRC      Changed interrupt reporting and enabling
*  26    22/05/2003  MRC      Tidied up interrupt fns
*  27    29/05/2003  PJE      two zl5011xIsrSourcesE enums were same
*  28    29/07/2003  APL      Renamed macro to _ZARLINK_ZLE5011X_BOARD
*  29    26/07/2004  MRC      Fixed some compiler warnings
*  30    26/08/2004  MRC      Added PW status byte support
*  31    03/03/2005  MRC      Added notification mechanism for clock recovery flags
*  32    31/03/2005  MRC      Added support for DMA packet Rx interrupt
*  33    02/06/2005  MRC      Added support for PW polling
*
*******************************************************************************/

#ifndef _ZL5011X_INTERRUPTS_H
#define _ZL5011X_INTERRUPTS_H

#ifdef __cplusplus
extern "C" {
#endif

/*****************   INCLUDE FILES   *****************************************/

#include "zl5011xApi.h"
#include "zl5011xCpqMap.h"
#include "zl5011xAdmMap.h"
#include "zl5011xPkiMap.h"

/*****************   MACROS   ************************************************/

/* number of devices to support for interrupts */
#define ZL5011X_ISR_NUM_INTERRUPT_TYPES   2
#define ZL5011X_ISR_MAX_NUMBER_DEVICES    16
#define ZL5011X_ISR_PW_DEFAULT_TICK_DELAY 2

/* IRQ interrupt 'vectors' as defined for powerPC */
#define PPC8260_IRQ1    19
#define PPC8260_IRQ2    20
#define PPC8260_IRQ3    21
#define PPC8260_IRQ4    22
#define PPC8260_IRQ5    23
#define PPC8260_IRQ6    24
#define PPC8260_IRQ7    25

#ifdef _ZARLINK_ZLE5011X_BOARD

/* This defines the processor interrupt vector that we use to 'connect' our
   interrupt service routine ( ..IsrConnect) to, in order to
   service interrupts from the device on the our evaluation board. */
   #define ZL5011X_INTERRUPT_VECTOR_APPN    PPC8260_IRQ1
   #define ZL5011X_INTERRUPT_VECTOR_API     PPC8260_IRQ4
#else

/**** If not using Zarlink board, modify the IRQ vector as appropriate to the target hardware ****/
   #define ZL5011X_INTERRUPT_VECTOR_APPN    PPC8260_IRQ1
   #define ZL5011X_INTERRUPT_VECTOR_API     PPC8260_IRQ2
#endif /* #ifdef _ZARLINK_ZLE5011X_BOARD */

#define ZL5011X_MAX_ADM_BIT_POSN (ZL5011X_1BIT_MASK << ZL5011X_HOST_DMA_RX_INTERRUPT)

typedef enum
{
   ZL5011X_NO_INTERRUPT = -1,

   /* the following interrupt sources relate directly to the individual bits in
      the interrupt mask */
   ZL5011X_WAN_TX_ERROR_OVERFLOW_INTERRUPT  = ZL5011X_ADM_WAN_TX_ERROR_OVERFLOW_INTERRUPT,
   ZL5011X_WAN_TX_ERROR_INTERRUPT           = ZL5011X_ADM_WAN_TX_ERROR_QUEUE_INTERRUPT,
   ZL5011X_WAN_TX_INFO_OVERFLOW_INTERRUPT   = ZL5011X_ADM_WAN_TX_INFO_OVERFLOW_INTERRUPT,
   ZL5011X_WAN_TX_INFO_INTERRUPT            = ZL5011X_ADM_WAN_TX_INFO_QUEUE_INTERRUPT,
   ZL5011X_WAN_TX_QUEUE_INTERRUPT           = ZL5011X_ADM_WAN_TX_QUEUE_INTERRUPT,
   ZL5011X_WAN_TX_QUEUE_OVERFLOW_INTERRUPT  = ZL5011X_ADM_WAN_TX_OVERFLOW_INTERRUPT,
   ZL5011X_WAN_TX_GRANULES_INTERRUPT        = ZL5011X_ADM_WAN_TX_GRANULES_INTERRUPT,
   ZL5011X_WAN_RX_ERROR_INTERRUPT           = ZL5011X_ADM_WAN_RX_QUEUE_INTERRUPT,
   ZL5011X_WAN_RX_OVERFLOW_INTERRUPT        = ZL5011X_ADM_WAN_RX_OVERFLOW_INTERRUPT,
   ZL5011X_WAN_RX_TASK_OVERFLOW_INTERRUPT   = ZL5011X_ADM_WAN_RX_TASK_OVERFLOW_INTERRUPT,
   ZL5011X_RTP_STATS_INTERRUPT              = ZL5011X_ADM_RTP_STATS_INTERRUPT,
   ZL5011X_WAN_CLK_INTERRUPT                = ZL5011X_ADM_CLOCK_INTERRUPT,
   ZL5011X_MEMORY_PARITY_INTERRUPT          = ZL5011X_ADM_MEMORY_PARITY_INTERRUPT,
   ZL5011X_MAC_IF_INTERRUPT                 = ZL5011X_ADM_MAC_IF_INTERRUPT,
   ZL5011X_PACKET_TX_INTERRUPT              = ZL5011X_ADM_PACKET_TX_INTERRUPT,
   ZL5011X_PACKET_RX_INTERRUPT              = ZL5011X_ADM_PACKET_RX_INTERRUPT,
   ZL5011X_TASK_MSG_INTERRUPT               = ZL5011X_ADM_TASK_CONTROL_INTERRUPT,
   ZL5011X_GRANULE_INTERRUPT                = ZL5011X_ADM_GRANULE_INTERRUPT,
   ZL5011X_HOST_OVERFLOW_INTERRUPT          = ZL5011X_ADM_HOST_OVERFLOW_INTERRUPT,
   ZL5011X_HOST_GRANULES_INTERRUPT          = ZL5011X_ADM_HOST_GRANULES_INTERRUPT,
   ZL5011X_HOST_DMA_RX_INTERRUPT            = ZL5011X_ADM_DMA_RX_INTERRUPT
} zl5011xIsrSourcesE;

/* bit masks etc for in PKQ Queue Drop Enable Reg (QDER) */
#define ZL5011X_PKQ_DROP_ENABLE_MASK    0x0001FFFF
#define ZL5011X_PKQ_TOTAL_THLD_BIT     16
#define ZL5011X_PKQ_NUM_QUEUES     4

#define ZL5011X_DPR_MESSAGES            (100)
#define ZL5011X_ISR_TASK_PRIORITY       (85)
#define ZL5011X_ISR_TASK_STACK_SIZE     (20000)
#define ZL5011X_DPR_TASK_PRIORITY       (90)
#define ZL5011X_DPR_TASK_STACK_SIZE     (20000)
#define ZL5011X_PW_TASK_PRIORITY        (80)
#define ZL5011X_PW_TASK_STACK_SIZE      (20000)

extern zl5011xParamsS *zl5011xIsrDeviceTable[ZL5011X_ISR_MAX_NUMBER_DEVICES];
extern Uint32T zl5011xIsrAppIntNum;
extern Uint32T zl5011xIsrApiIntNum;

/*****************   DATA STRUCTURES   ***************************************/

typedef struct
{
    zl5011xParamsS *zl5011xParams;
    zl5011xIsrSourcesE interruptSource;
    Uint32T activeInterrupts;
    Uint32T context;
    Uint32T misc;
} zl5011xInterruptQueueDataS;

/****************   FUNCTION PROTOTYPES & Param Structures  ******************/

zlStatusE zl5011xIsrHandler(void);
void zl5011xIsrApiHandler(void);

/********************************/

typedef struct
{
    zl5011xIsrSourcesE interruptSource;
    Uint32T context;
    Uint32T interruptBits;
    Uint8T portNumber;
} zl5011xIsrInterruptSourceS;

zlStatusE zl5011xIsrEnableInterruptSourceStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrInterruptSourceS *par);
zlStatusE zl5011xIsrEnableInterruptSource(zl5011xParamsS *zl5011xParams,
      zl5011xIsrInterruptSourceS *par);
zlStatusE zl5011xIsrDisableInterruptSourceStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrInterruptSourceS *par);
zlStatusE zl5011xIsrDisableInterruptSource(zl5011xParamsS *zl5011xParams,
      zl5011xIsrInterruptSourceS *par);

/********************************/

typedef struct
{
    Uint32T     interruptBits;
} zl5011xIsrEnableFreezeS;

zlStatusE zl5011xIsrEnableFreezeStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrEnableFreezeS *par);
zlStatusE zl5011xIsrEnableFreeze(zl5011xParamsS *zl5011xParams,
      zl5011xIsrEnableFreezeS *par);

/********************************/

typedef struct
{
    Uint32T     interruptBits;
} zl5011xIsrDisableFreezeS;

zlStatusE zl5011xIsrDisableFreezeStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrDisableFreezeS *par);
zlStatusE zl5011xIsrDisableFreeze(zl5011xParamsS *zl5011xParams,
      zl5011xIsrDisableFreezeS *par);

/********************************/

typedef struct
{
   zl5011xBooleanE rtpStatsEnable;
} zl5011xIsrAddDeviceS;

zlStatusE zl5011xIsrAddDeviceStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrAddDeviceS *par);
zlStatusE zl5011xIsrAddDevice(zl5011xParamsS *zl5011xParams,
      zl5011xIsrAddDeviceS *par);

/********************************/

typedef struct
{
   Uint32T unused;
} zl5011xIsrRemoveDeviceS;

zlStatusE zl5011xIsrRemoveDeviceStructInit(zl5011xParamsS *zl5011xParams,
      zl5011xIsrRemoveDeviceS   *par);
zlStatusE zl5011xIsrRemoveDevice(zl5011xParamsS *zl5011xParams,
      zl5011xIsrRemoveDeviceS   *par);

/********************************/

void zl5011xPwStatusCheck(zl5011xParamsS *zl5011xParams);
zlStatusE zl5011xIsrPwReportEnable(zl5011xBooleanE enable);
void zl5011xIsrPwTask(void);

zlStatusE zl5011xIsrSetCetStatusFunc(zlStatusE (*ptr)(zl5011xParamsS *, Uint32T, Uint32T));
zlStatusE zl5011xIsrSetDmaRxFunc(zlStatusE (*ptr)(void));
zlStatusE zl5011xIsrSetCetQueueid(OS_MSG_Q_ID MsgQID);
zlStatusE zl5011xIsrIsRunning(zl5011xBooleanE *pFlag);
zlStatusE zl5011xIsrCheckDevice(zl5011xParamsS *zl5011xParams, zl5011xBooleanE *pFlag);

#ifdef __cplusplus
}
#endif  /* #ifdef __cplusplus */

#endif /* #ifndef _ZL5011X_INTERRUPTS_H */