?? zl5011xcpu.c
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/*******************************************************************************
*
* File name: zl5011xCpu.c
*
* Version: 34
*
* Author: PJE
*
* Date created: 21/03/2002
*
* Copyright 2002, 2003, 2004, 2005, Zarlink Semiconductor Limited.
* All rights reserved.
*
* Module Description:
*
* This file contains all the functions that will initialise and control
* the CPU block.
*
* Revision History:
*
* Rev: Date: Author: Comments:
* 1 25/03/2002 PJE before spec simplified
* 2 25/03/2002 PJE compiles OK but CpuInit not finished.
* 3 26/03/2002 PJE runs.
* 4 27/03/2002 PJE zl5011xCpuDmaGetRxStatus() more params
* 5 17/04/2002 MRC Changed the CHECK_.. macros to ZL5011X_CHECK_..
* 6 17/04/2002 MRC Updated the revision history.
* 7 26/04/2002 MRC Changed some data names in response to comments
* from Thomas, regarding the MIB interface.
* 8 30/04/2002 PJE missing include file
* 9 15/05/2002 PJE added function zl5011xCpuSetTimeoutPeriod()
* 10 15/05/2002 PJE Minor mods.
* 11 07/06/2002 LCW Added zl5011xCpuDmaGetRxSeqNum
* 12 11/06/2002 MRC Minor tweaks
* 13 02/07/2002 PJE new timeoutperiod item in zl5011xCpuDmaIfS and
* cleanup for review.
* 14 12/07/2002 MRC Rationalised the 2 enums for CPU queues
* 15 16/09/2002 PJE New zl5011xCpuDmaSetPadding() &
* zl5011xCpuDmaSetDreqPolarity debugging.
* ..and incorporate them in CpuInit
* 16 23/09/2002 ARW Renamed zl5011xCpuDmaGetRxStatus to
* zl5011xCpuDmaGetRxQueueStatus
* Added new functions zl5011xCpuDmaGetRxStatus &
* zl5011xCpuDmaGetTxStatus
* 17 26/09/2002 ARW Renamed zl5011xCpuDmaGetRxQueueStatus to
* zl5011xCpuDmaGetRxQueueStatus
* 18 01/10/2002 DJA File header updated
* ZL5011X_TRACE messages fixed up
* 19 07/10/2002 ARW Added new function: CpuDmaSetDackPolarity
* Added new functionality to CpuInit
* Changed defaults in CpuInit
* Updated zl5011xCpuDmaSetRxControl &
* zl5011xCpuDmaSetTxControl
* 20 08/10/2002 PJE Added new function: zl5011xCpuDmaGetIntrStatus
* 21 11/10/2002 PJE peer rvw items
* 22 15/10/2002 ARW Removed ZL5011X_DMA_HI_Z capability from
* DmaRxSetControl & DmaTxSetControl
* Added a parmaeter to DmaGetTxStatus to make it
* more consistant with get DmaGetRxStatus
* Swapped the GIF busy bits tested in DmaTxGetStatus
* and DmaGetRxStatus
* Changed the default set in CpuInit
* 23 16/10/2002 ARW Inverted 3 bits for the constat register
* 24 23/10/2002 ARW Function changes to match spec changes
* Added new functions for DMA bypass
* 25 31/10/2002 MRC Added variants + minor fixes
* 26 24/03/2003 ARW Added extra parameters to functions
* zl5011xCpuDmaPTHWrite & zl5011xCpuDmaPRHRead
* 27 15/04/2003 ARW Applied byte swapping to fuynctions
* zl5011xCpuDmaPTHWrite & zl5011xCpuDmaPRHRead
* 28 09/06/2003 DJA Performed pre-audit actions
* 29 05/07/2004 APL Removed spurious comment
* 30 23/07/2004 MRC Fixed some compiler warnings
* 31 29/07/2004 MRC Fixed some compiler warnings
* 32 06/09/2004 APL Clarified logic for DMA busy processing
* 33 11/02/2005 MRC Used macros for writing / reading DMA packets
* 34 14/02/2005 MRC Removed restriction on interrupt selection
*
******************************************************************************/
/***************** INCLUDE FILES *****************************/
#include "zl5011x.h"
#include "zl5011xCpu.h"
#include "zl5011xCpuMap.h"
#include "zl5011xUtilLib.h"
/***************** # DEFINES **********************************************/
/***************** ENUMERATIONS ******************************************/
typedef enum zl5011xDmaDeviceAccessTypeE
{
ZL5011X_DMA_READ_ONLY,
ZL5011X_DMA_WRITE_ONLY,
ZL5011X_DMA_READ_WRITE
} zl5011xDmaDeviceAccessTypeE;
/***************** EXPORTED GLOBAL VARIABLES *****************************/
/***************** STATIC GLOBAL VARIABLES *****************************/
/***************** STATIC FUNCTION DECLARATIONS *****************************/
static zlStatusE zl5011xCpuDmaStoreConstatRegister(zl5011xParamsS *zl5011xParams,
Uint32T bits,Uint32T bitMask,zl5011xDmaDeviceAccessTypeE accessType);
/***************** EXPORTED FUNCTION DEFINTIONS ***************************/
/*******************************************************************************
Function:
zl5011xCpuInit
Description:
This function initialises the block, leaving then DMA disabled.
Sets the block ID for the CPU.
Inputs:
zl5011xParams Pointer to the structure for this device instance
Outputs:
None
Returns:
zlStatusE
Remarks:
None
*******************************************************************************/
extern zlStatusE zl5011xCpuInit(zl5011xParamsS *zl5011xParams)
{
zlStatusE status = ZL5011X_OK;
ZL5011X_TRACE(ZL5011X_CPU_FN_ID, "zl5011xCpuInit:", 0, 0, 0, 0, 0, 0);
status = zl5011xCpuSetTimeoutPeriod(zl5011xParams,
ZL5011X_CPU_DEFAULT_TIMEOUT);
/* Reset the DMA structures dmaParams using fns if possible */
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetDreqPolarity( zl5011xParams, ZL5011X_NEGATIVE);
}
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetDackPolarity( zl5011xParams, ZL5011X_NEGATIVE);
}
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetRxMode( zl5011xParams, ZL5011X_DMA_RX_SINGLEPKT);
}
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetInterruptMode(zl5011xParams,ZL5011X_DMA_NO_INTERRUPT);
}
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetRxQueue( zl5011xParams, ZL5011X_QUEUE_0);
}
if(status == ZL5011X_OK)
{
status = zl5011xCpuDmaSetRxControl( zl5011xParams, ZL5011X_DMA_DISABLED);
}
if(status == ZL5011X_OK)
{
status= zl5011xCpuDmaSetTxControl( zl5011xParams, ZL5011X_DMA_DISABLED);
}
if(status == ZL5011X_OK)
{
status= zl5011xCpuDmaSetPadding( zl5011xParams, ZL5011X_DMA_NO_PADDING);
}
if (status == ZL5011X_OK)
{
status = zl5011xCpuDmaErrorFlagsDisable(zl5011xParams);
}
return(status);
}
/*******************************************************************************
Function:
zl5011xCpuDmaSetRxMode
Description:
This function writes to the device CPU block to set the DMA Rx Mode to
single packet, empty buffer, empty buffer when it is no longer empty, or
continuous mode.
Inputs:
zl5011xParams Pointer to the structure for this device instance
rxMode Any of: ZL5011X_DMA_RX_SINGLEPKT,
ZL5011X_DMA_RX_EMPTYBUF,
ZL5011X_DMA_RX_CONTIN,
ZL5011X_DMA_RX_WAIT_AND_EMPTYBUF
Outputs:
None
Returns:
zlStatusE
Remarks:
None
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetRxMode(zl5011xParamsS *zl5011xParams,
zl5011xDmaRxModeE rxMode)
{
zlStatusE status = ZL5011X_OK;
Uint32T bits,bitMask = (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_ALL_PKT_BIT) |
(ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_CONTINUOUS_BIT);
ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetRxMode: mode %d",
rxMode, 0, 0, 0, 0, 0);
switch( rxMode)
{
case ZL5011X_DMA_RX_SINGLEPKT:
bits = 0;
break;
case ZL5011X_DMA_RX_EMPTYBUF:
bits = (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_ALL_PKT_BIT);
break;
case ZL5011X_DMA_RX_WAIT_AND_EMPTYBUF:
bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_CONTINUOUS_BIT;
break;
case ZL5011X_DMA_RX_CONTIN:
bits = (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_ALL_PKT_BIT) |
(ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_CONTINUOUS_BIT);
break;
default:
bits = 0;
status = ZL5011X_PARAMETER_INVALID;
break;
}
if (status == ZL5011X_OK)
{
status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
ZL5011X_DMA_READ_WRITE);
if (status == ZL5011X_OK)
{
/* update structure */
zl5011xParams->cpuDmaIf.rxMode= rxMode;
}
}
return(status);
}
/*******************************************************************************
Function:
zl5011xCpuDmaSetInterruptMode
Description:
This function writes to the device CPU block to set the DMA Interrupt Mode
to one of three possible options, assuming that the option is valid for the
Rx mode selected.
Inputs:
zl5011xParams Pointer to the structure for this device instance
interruptMode Any of: ZL5011X_DMA_NO_INTERRUPT,
ZL5011X_DMA_INTERRUPT_ON_PACKET,
ZL5011X_DMA_INTERRUPT_ON_FINISH
Outputs:
None
Returns:
zlStatusE
Remarks:
This function must be run AFTER zl5011xCpuDmaSetRxMode to ensure the
interrupts are valid for the Rx mode selected
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetInterruptMode(zl5011xParamsS *zl5011xParams,
zl5011xDmaInterruptModeE interruptMode)
{
zlStatusE status = ZL5011X_OK;
Uint32T bits = 0, bitMask = (ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_INT_ALL_PKT_BIT) |
(ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_INT_DONE_BIT);
ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetInterruptMode: mode %d",
interruptMode, 0, 0, 0, 0, 0);
switch (interruptMode)
{
case ZL5011X_DMA_NO_INTERRUPT: /* Supported in all Rx modes */
bits = 0;
break;
case ZL5011X_DMA_INTERRUPT_ON_PACKET:
bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_INT_ALL_PKT_BIT;
break;
case ZL5011X_DMA_INTERRUPT_ON_FINISH:
/* Doesn't make sense to enable interrupt of finish if DMA is set
to continuous - as in never finish. */
if (zl5011xParams->cpuDmaIf.rxMode == ZL5011X_DMA_RX_CONTIN)
{
status = ZL5011X_PARAMETER_INVALID;
}
else
{
bits = ZL5011X_1BIT_MASK << ZL5011X_DMA_RX_INT_DONE_BIT;
}
break;
default:
status = ZL5011X_PARAMETER_INVALID;
break;
}
if (status == ZL5011X_OK)
{
status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
ZL5011X_DMA_READ_WRITE);
if (status == ZL5011X_OK)
{
zl5011xParams->cpuDmaIf.dmaInterruptMode = interruptMode;
}
}
return(status);
}
/*******************************************************************************
Function:
zl5011xCpuDmaSetRxQueue
Description:
This function writes to the device CPU block to set the DMA Rx Queue ID
Can be changed without stopping DMA.
Inputs:
zl5011xParams Pointer to the structure for this device instance
queueId one of the 4 queues
Outputs:
None
Returns:
zlStatusE
Remarks:
None
*******************************************************************************/
extern zlStatusE zl5011xCpuDmaSetRxQueue(zl5011xParamsS *zl5011xParams,
zl5011xQueueE queueId)
{
zlStatusE status = ZL5011X_OK;
Uint32T bits = queueId << ZL5011X_DMA_QUEUE_ID_LSB,
bitMask = ZL5011X_2BIT_MASK << ZL5011X_DMA_QUEUE_ID_LSB;
ZL5011X_TRACE(ZL5011X_CPU_FN_ID,"zl5011xCpuDmaSetRxQueue: queue ID %d",
queueId, 0, 0, 0, 0, 0);
status = ZL5011X_CHECK_QUEUE_NUMBER(queueId);
if (status == ZL5011X_OK)
{
status = zl5011xCpuDmaStoreConstatRegister(zl5011xParams,bits,bitMask,
ZL5011X_DMA_READ_WRITE);
if (status == ZL5011X_OK)
{
/* update structure */
zl5011xParams->cpuDmaIf.dmaQueueId= queueId;
}
}
return(status);
}
/*******************************************************************************
Function:
zl5011xCpuDmaSetRxControl
Description:
This function writes to the device CPU block to set the DMA Rx control mode.
Inputs:
zl5011xParams Pointer to the structure for this device instance
rxControlMode Any of: ZL5011X_DMA_DISABLED,
ZL5011X_DMA_ENABLED
Outputs:
None
Returns:
zlStatusE
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