#ifndef  __AD1836_DEFINED
	#define __AD1836_DEFINED

// macros for setting the codec register values before transfer
#define SET_AD1836_DAC_CONTROL_1(adr,fct) *(sAD1836TxRegs+0x00) = (adr << 0xC) | fct
#define SET_AD1836_DAC_CONTROL_2(adr,fct) *(sAD1836TxRegs+0x01) = (adr << 0xC) | fct
#define SET_AD1836_DAC1L_VOLUME(adr,fct)  *(sAD1836TxRegs+0x02) = (adr << 0xC) | fct
#define SET_AD1836_DAC1R_VOLUME(adr,fct)  *(sAD1836TxRegs+0x03) = (adr << 0xC) | fct
#define SET_AD1836_DAC2L_VOLUME(adr,fct)  *(sAD1836TxRegs+0x04) = (adr << 0xC) | fct
#define SET_AD1836_DAC2R_VOLUME(adr,fct)  *(sAD1836TxRegs+0x05) = (adr << 0xC) | fct
#define SET_AD1836_DAC3L_VOLUME(adr,fct)  *(sAD1836TxRegs+0x06) = (adr << 0xC) | fct
#define SET_AD1836_DAC3R_VOLUME(adr,fct)  *(sAD1836TxRegs+0x07) = (adr << 0xC) | fct
#define SET_AD1836_ADC_CONTROL_1(adr,fct) *(sAD1836TxRegs+0x08) = (adr << 0xC) | fct
#define SET_AD1836_ADC_CONTROL_2(adr,fct) *(sAD1836TxRegs+0x09) = (adr << 0xC) | fct
#define SET_AD1836_ADC_CONTROL_3(adr,fct) *(sAD1836TxRegs+0x0A) = (adr << 0xC) | fct

// prototype for codec initialization
extern void start_AD1836(void);

// global integers (32bit) for access to the ADC/DAC samples by the application code
extern int iADC1L, iADC1R, iADC2L, iADC2R;
extern int iDAC1L, iDAC1R, iDAC2L, iDAC2R, iDAC3L, iDAC3R;

// global adress of the SPI transfer array for codec register value transfer
extern volatile unsigned short sAD1836TxRegs[];

// Flag to indicate that a new sample has been read by the SPORT0 ISR
extern char cNewSample;

#endif //__AD1836_DEFINED