?? lpc214x.h
字號:
#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
#define U0MCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x10))
#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
#define U0MSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x18))
#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))
/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
#define UART1_BASE_ADDR 0xE0010000
#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))
/* I2C Interface 0 */
#define I2C0_BASE_ADDR 0xE001C000
#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))
/* I2C Interface 1 */
#define I2C1_BASE_ADDR 0xE005C000
#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
#define I21ADR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
#define I21SCLH (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
#define I21SCLL (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
#define I21CONCLR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))
/* SPI0 (Serial Peripheral Interface 0) */
#define SPI0_BASE_ADDR 0xE0020000
#define S0SPCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
#define S0SPSR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
#define S0SPDR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))
/* SSP Controller */
#define SSP_BASE_ADDR 0xE0068000
#define SSPCR0 (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x00))
#define SSPCR1 (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x04))
#define SSPDR (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x08))
#define SSPSR (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x0C))
#define SSPCPSR (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x10))
#define SSPIMSC (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x14))
#define SSPRIS (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x18))
#define SSPMIS (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x1C))
#define SSPICR (*(volatile unsigned long * )(SSP_BASE_ADDR + 0x20))
/* Real Time Clock */
#define RTC_BASE_ADDR 0xE0024000
#define ILR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
#define CTC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
#define CCR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
#define CIIR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
#define AMR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
#define CTIME0 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
#define CTIME1 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
#define CTIME2 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
#define SEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
#define MIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
#define HOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
#define DOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
#define DOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
#define DOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
#define MONTH (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
#define YEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
#define ALSEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
#define ALMIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
#define ALHOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
#define ALDOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
#define ALDOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
#define ALDOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
#define ALMON (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
#define ALYEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
#define PREINT (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
#define PREFRAC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))
/* A/D Converter 0 (AD0) */
#define AD0_BASE_ADDR 0xE0034000
#define AD0CR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
#define AD0GDR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
#define AD0STAT (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))
#define AD0INTEN (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
#define AD0DR0 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
#define AD0DR1 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
#define AD0DR2 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
#define AD0DR3 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
#define AD0DR4 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
#define AD0DR5 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
#define AD0DR6 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
#define AD0DR7 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
#define ADGSR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x08))
/* A/D Converter 1 (AD1) */
#define AD1_BASE_ADDR 0xE0060000
#define AD1CR (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x00))
#define AD1GDR (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x04))
#define AD1STAT (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x30))
#define AD1INTEN (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x0C))
#define AD1DR0 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x10))
#define AD1DR1 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x14))
#define AD1DR2 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x18))
#define AD1DR3 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x1C))
#define AD1DR4 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x20))
#define AD1DR5 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x24))
#define AD1DR6 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x28))
#define AD1DR7 (*(volatile unsigned long *)(AD1_BASE_ADDR + 0x2C))
/* D/A Converter */
#define DAC_BASE_ADDR 0xE006C000
#define DACR (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00))
/* Watchdog */
#define WDG_BASE_ADDR 0xE0000000
#define WDMOD (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00))
#define WDTC (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04))
#define WDFEED (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08))
#define WDTV (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C))
/* USB Controller */
#define USB_BASE_ADDR 0xE0090000 /* USB Base Address */
/* Device Interrupt Registers */
#define DEV_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00))
#define DEV_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04))
#define DEV_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08))
#define DEV_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C))
#define DEV_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C))
/* Endpoint Interrupt Registers */
#define EP_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
#define EP_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
#define EP_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
#define EP_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
#define EP_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))
/* Endpoint Realization Registers */
#define REALIZE_EP (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
#define EP_INDEX (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
#define MAXPACKET_SIZE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))
/* Command Reagisters */
#define CMD_CODE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
#define CMD_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))
/* Data Transfer Registers */
#define RX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
#define TX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
#define RX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
#define TX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
#define USB_CTRL (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))
/* DMA Registers */
#define DMA_REQ_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0x50))
#define DMA_REQ_CLR (*((volatile unsigned long *)USB_BASE_ADDR + 0x54))
#define DMA_REQ_SET (*((volatile unsigned long *)USB_BASE_ADDR + 0x58))
#define UDCA_HEAD (*((volatile unsigned long *)USB_BASE_ADDR + 0x80))
#define EP_DMA_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0x84))
#define EP_DMA_EN (*((volatile unsigned long *)USB_BASE_ADDR + 0x88))
#define EP_DMA_DIS (*((volatile unsigned long *)USB_BASE_ADDR + 0x8C))
#define DMA_INT_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0x90))
#define DMA_INT_EN (*((volatile unsigned long *)USB_BASE_ADDR + 0x94))
#define EOT_INT_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0xA0))
#define EOT_INT_CLR (*((volatile unsigned long *)USB_BASE_ADDR + 0xA4))
#define EOT_INT_SET (*((volatile unsigned long *)USB_BASE_ADDR + 0xA8))
#define NDD_REQ_INT_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0xAC))
#define NDD_REQ_INT_CLR (*((volatile unsigned long *)USB_BASE_ADDR + 0xB0))
#define NDD_REQ_INT_SET (*((volatile unsigned long *)USB_BASE_ADDR + 0xB4))
#define SYS_ERR_INT_STAT (*((volatile unsigned long *)USB_BASE_ADDR + 0xB8))
#define SYS_ERR_INT_CLR (*((volatile unsigned long *)USB_BASE_ADDR + 0xBC))
#define SYS_ERR_INT_SET (*((volatile unsigned long *)USB_BASE_ADDR + 0xC0))
#define MODULE_ID (*((volatile unsigned long *)USB_BASE_ADDR + 0xFC))
#endif // __LPC214x_H
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