?? sd_includes.h
字號(hào):
unsigned BIT02:3;
unsigned BIT3:1;
unsigned BIT4:1;
unsigned BIT5:1;
unsigned BIT6:1;
unsigned BIT7:1;
} ;
struct SD_bits01{
unsigned BIT8:1; // MSB first
unsigned BIT9:1;
unsigned BIT10:1;
unsigned BIT11:1;
unsigned BIT12:1;
unsigned BIT13:1;
unsigned BIT14:1;
unsigned BIT15:1;
unsigned BIT01:2;
unsigned BIT2:1;
unsigned BIT3:1;
unsigned BIT4:1;
unsigned BIT5:1;
unsigned BIT6:1;
unsigned BIT7:1;
} ;
struct SD_bits05{
unsigned BIT8:1; // MSB first
unsigned BIT9:1;
unsigned BIT10:1;
unsigned BIT11:1;
unsigned BIT12:1;
unsigned BIT13:1;
unsigned BIT14:1;
unsigned BIT15:1;
unsigned BIT05:6;
unsigned BIT6:1;
unsigned BIT7:1;
} ;
struct SD_bits06{
unsigned BIT8:1; // MSB first
unsigned BIT9:1;
unsigned BIT10:1;
unsigned BIT11:1;
unsigned BIT12:1;
unsigned BIT13:1;
unsigned BIT14:1;
unsigned BIT15:1;
unsigned BIT06:7;
unsigned BIT7:1;
} ;
#define SD_TimeOut 999999
/*
struct bits09{
unsigned BIT09:10; // LSB First
unsigned BIT10:1;
unsigned BIT11:1;
unsigned BIT12:1;
unsigned BIT13:1;
unsigned BIT14:1;
unsigned BIT15:1;
} ;*/
// ===================================================================
//
// Registers Address definitions
//
// ===================================================================
#define SD_BUSPORT_BASE 0x02c0 // Base Address of SDHC Module
#define SD_SDCON *(volatile muint16*)(SD_BUSPORT_BASE+0x00) // SDHC Control Register //
#define SD_SDSTAT *(volatile muint16*)(SD_BUSPORT_BASE+0x02) // SDHC Status Register //(Read only bit)
#define SD_SDCLKCON *(volatile muint16*)(SD_BUSPORT_BASE+0x04)
#define SD_SDCMDATCON *(volatile muint16*)(SD_BUSPORT_BASE+0x06) // Command and Data Control Register
#define SD_SDRTOUT *(volatile muint16*)(SD_BUSPORT_BASE+0x08) // Response Timeout Register //
#define SD_SDRDTOUT *(volatile muint16*)(SD_BUSPORT_BASE+0x0A) // Read Timeout Register //
#define SD_SDBLKLN *(volatile muint16*)(SD_BUSPORT_BASE+0x0C) // Block Length Register // //(Write bit)
#define SD_SDNOBLK *(volatile muint16*)(SD_BUSPORT_BASE+0x0E) /* Number of Blocks Register */
#define SD_SDINTREN *(volatile muint16*)(SD_BUSPORT_BASE+0x10) // Interrupt Enable Register //
#define SD_SDCMDNO *(volatile muint16*)(SD_BUSPORT_BASE+0x12) // Command Register //
#define SD_SDARGH *(volatile muint16*)(SD_BUSPORT_BASE+0x14) // Argument High Register //
#define SD_SDARGL *(volatile muint16*)(SD_BUSPORT_BASE+0x16) // Argument Low Register //
#define SD_SDRSP *(volatile muint16*)(SD_BUSPORT_BASE+0x18) // Response Register
#define SD_SDATA *(volatile muint16*)(SD_BUSPORT_BASE+0x1A) // SD Data Register
//t #define SD_SDCON *(volatile muint16*)(BUSPORT_BASE+0x00) /* SDHC Control Register */
//bit 15~6 are unimplemented
#define SD_SDEN ((struct SD_bits*)&SD_SDCON)->BIT0 // Module enable, 1= module Enable
#define SD_QIEN ((struct SD_bits*)&SD_SDCON)->BIT1 // Fast data transfer enable, 1= fast data transfer
#define SD_PDEN ((struct SD_bits*)&SD_SDCON)->BIT2 // Pull-down enable, 1= Pull-down Enable
#define SD_PUEN ((struct SD_bits*)&SD_SDCON)->BIT3 // Pull-up enable, 1= Pull-up Enable
#define SD_IRST ((struct SD_bits*)&SD_SDCON)->BIT4 // Interna reset enable, 1= internal reset Enable
#define SD_LBUF ((struct SD_bits*)&SD_SDCON)->BIT5 // Last data buffer, 1= the last block of data to be sent or received
//t #define SD_SDSTAT *(volatile muint16*)(BUSPORT_BASE+0x02) // SDHC Status Register //(Read only bit)
//bit 15,14 are unimplemented
#define SD_RDTO ((struct SD_bits56*)&SD_SDSTAT)->BIT0 // Read data timeout, 1= read data timeout
#define SD_RSPTO ((struct SD_bits56*)&SD_SDSTAT)->BIT1 // Response timeout, 1= response timeout
#define SD_WR_ECRC ((struct SD_bits56*)&SD_SDSTAT)->BIT2 // CRC write error, 1= write data CRC error
#define SD_RD_ECRC ((struct SD_bits56*)&SD_SDSTAT)->BIT3 // CRC read error, 1= read data CRC error
#define SD_RSP_ECRC ((struct SD_bits56*)&SD_SDSTAT)->BIT4 // Response CRC error, 1= response CRC error
#define SD_WR_ECRC_CODE ((struct bits56*)&SD_SDSTAT)->BIT56 // bit 5&6, Write CRC error code, 00= no transmit error, 01=transmit error, 10=no CRC response
#define SDCKON ((struct SD_bits56*)&SD_SDSTAT)->BIT7 // SD card clock running, 1= SD card clock running
#define SD_DTDN ((struct SD_bits56*)&SD_SDSTAT)->BIT8 // Data transfer done, 1= data transfer done
#define SD_WRDN ((struct SD_bits56*)&SD_SDSTAT)->BIT9 // Write SD memory card done, 1= busy deasserted (programmed successfully)
#define SD_ECR ((struct SD_bits56*)&SD_SDSTAT)->BIT10 // End command response, 1 = next command ready
#define SD_CD ((struct SD_bits56*)&SD_SDSTAT)->BIT11 // Card detect, 1= memory card inserted and detected
#define SD_FEMPTY ((struct SD_bits56*)&SD_SDSTAT)->BIT12 // Data FIFO empty, 1= transmit or receive FIFO empty
#define SD_FFULL ((struct SD_bits56*)&SD_SDSTAT)->BIT13 // Data FIFO full, 1= transmit or receive FIFO full
//t #define SD_SDCLKCON *(volatile muint16*)(BUSPORT_BASE+0x04) // SD Clock Rate Register //
// bit 15~4 are unimplemented
#define SD_CLKRATE ((struct SD_bits02*)&SD_SDCLKCON)->BIT02 // bit0~2, Clock rate for SD card clock, (Write bit)
#define SD_SCLKEN ((struct SD_bits02*)&SD_SDCLKCON)->BIT3 // SD card clock enable, 1= SD card clock Enable
// 000 Unimplemented
// 001 1/2 module clock
// 010 1/3 module clock
// 011 1/4 module clock
// 100 1/5 module clock
// 101 1/6 module clock
// 110 1/10 module clock
// 111 400 KHz
//t #define SD_SDCMDATCON *(volatile muint16*)(BUSPORT_BASE+0x06) // Command and Data Control Register
// bit 15,14,13,12,11,8 are unimplemented
#define SD_RSPNO ((struct SD_bits01*)&SD_SDCMDATCON)->BIT01 // Response types, (Write bit) // for testing
#define SD_DATAEN ((struct SD_bits01*)&SD_SDCMDATCON)->BIT2 // Data transfer enable, 1= data transfer enabled
#define SD_WRD ((struct SD_bits01*)&SD_SDCMDATCON)->BIT3 // Data read or write operation, 1= write operation
#define SD_SBMOD ((struct SD_bits01*)&SD_SDCMDATCON)->BIT4 // Data transfer mode selection, 1= stream mode (MMC only)
#define SD_MBLK ((struct SD_bits01*)&SD_SDCMDATCON)->BIT5 // Multiple block mode, 1= multiple block mode
#define SD_BUSY ((struct SD_bits01*)&SD_SDCMDATCON)->BIT6 // Expected busy status, 1= busy status expected
#define SD_INIT ((struct SD_bits01*)&SD_SDCMDATCON)->BIT7 // Card initialization, 1 = SD clock init enable
#define SD_WBUS ((struct SD_bits01*)&SD_SDCMDATCON)->BIT9 // Wide bus selection, 1= 4-bits bus mode
#define SD_NOBEN ((struct SD_bits01*)&SD_SDCMDATCON)->BIT10 // NOB enable, 1= NOB Enable
// 00 no response
// 01 Format R1
// 10 Format R2
// 11 Format R3
//t #define SD_SDRTOUT *(volatile muint16*)(BUSPORT_BASE+0x08) // Response Timeout Register //
// bit 15~7 are unimplemented
#define SD_RSP_TO ((struct bits06*)&SD_SDRTOUT)->BIT06 // bit 0~6, Response timeout, 64~2, (Write bit)
//t #define SD_SDRDTOUT *(volatile muint16*)(BUSPORT_BASE+0x0A) // Read Timeout Register //
#define SD_RD_TO SD_SDRDTOUT // bit 0~15, Read timeout, 65536~2
//t #define SD_SDINTREN *(volatile muint16*)(BUSPORT_BASE+0x10) // Interrupt Enable Register //
// bit 15~6 are unimplement
#define SD_TOIE ((struct SD_bits*)&SD_SDINTREN)->BIT0 // Timeout interrupt enable, 1= timeout interupt Enable
#define SD_CRCIE ((struct SD_bits*)&SD_SDINTREN)->BIT1 // CRC error interrupt enable, 1= CRC error interrupt Enable
#define SD_DTDNIE ((struct SD_bits*)&SD_SDINTREN)->BIT2 // Data transfer done interrupt enable, 1= data transfer done interrupt Enable
#define SD_WRDNIE ((struct SD_bits*)&SD_SDINTREN)->BIT3 // Write operation done interrupt enable, 1= write operation done interrupt Enable
#define SD_ECRIE ((struct SD_bits*)&SD_SDINTREN)->BIT4 // End command response interrupt enable, 1= end command response interrupt Enable
#define SD_CDIE ((struct SD_bits*)&SD_SDINTREN)->BIT5 // Auto card detect interrupt enable, 1= card detect interrupt Enable
//t #define SD_SDCMDNO *(volatile muint16*)(BUSPORT_BASE+0x12) // Command Register //
// bit 15~6 are unimplemented
#define SD_CMDNO ((struct SD_bits05*)&SD_SDCMDNO)->BIT05 // bit0~5, Command number (Write bit)
struct PIM_bits8{
unsigned BIT0:1;
unsigned BIT1:1;
unsigned BIT2:1;
unsigned BIT3:1;
unsigned BIT4:1;
unsigned BIT5:1;
unsigned BIT6:1;
unsigned BIT7:1;
} ;
#define PTM0_CMD ((struct PIM_bits8*)&PTM)->BIT0 //
#define PTM1_CLK ((struct PIM_bits8*)&PTM)->BIT1 //
#define PTM2 ((struct PIM_bits8*)&PTM)->BIT2 //
#define PTM3 ((struct PIM_bits8*)&PTM)->BIT3 //
#define PTM4 ((struct PIM_bits8*)&PTM)->BIT4 //
#define PTM5 ((struct PIM_bits8*)&PTM)->BIT5 //
// for SD speed optimization testing
//#define PTJ *(volatile muint8*)(PIMPORT_BASE+0x10) // port M i/o register
//#define DDRJ *(volatile muint8*)(PIMPORT_BASE+0x12) // port M data direction register
//#define RDRJ *(volatile muint8*)(PIMPORT_BASE+0x13) // port M reduced drive register
// end of SD additional codes
//----------------------------
#endif _H_SD_INCLUDES_ // end of my Constants & Macros definition
//
// The end of file sd_includes.h
// *********************************************************************************
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