if(hshostlink ==1)
								{
									DataToEndpoint0 = 0x55;
								}
								else
								{
									DataToEndpoint0 = 0xaa;
								}
								Write_SX2reg(SX2_EP0BUF, DataToEndpoint0);
								/*寫入要傳回的數(shù)據(jù)的長度*/
								Write_SX2reg(SX2_EP0BC, 1);
								break;
	
							/* SX2REGRD request */
							case VR_REGREAD:
								/* read the requested register */									
								Read_SX2reg(setupBuff[4], &regValue);
								break;
							
							case VR_ENDPOINT0WRITE:
								/*確定是否有數(shù)據(jù)相*/
								if (setupBuff[6] > 0 || setupBuff[7] > 0)
								{
									/*等待EP0數(shù)據(jù)包準備好的標志*/
									while(!sx2EP0Buf);
									/* 清除EP0數(shù)據(jù)包準備好的標志*/
									sx2EP0Buf = FALSE;
									/* write the data to the EP0 data buffer */
									Write_SX2reg(SX2_EP0BUF, regValue);

								   /* write the byte count so the SX2 sends one byte; */
								   /* ignore requests for more than one byte  */
									Write_SX2reg(SX2_EP0BC, 1);
								}
								else
								{
									/*無數(shù)據(jù)相*/
									Write_SX2reg(SX2_EP0BC, 0);
								}
								break;
							
							default:
								/* unsupported request */
								/* write any non-zero value to the setup register
						   		to stall the request. */
								Write_SX2reg(SX2_SETUP, 0xff);
							break;
						}
					}
					else
					{
						/*不支持的請求,寫非零數(shù)到SX2_SETUP，取消此請求*/
						Write_SX2reg(SX2_SETUP, 0xff);
					}			
				}/*解析IN類型的命令申請*/						
			}/*關于setup中斷的處理*/
		}/*自舉后進行主程序的循環(huán)*/
	}
} 

BOOL Load_descriptors(char length, char* desc)
{
	unsigned char i;
	/* write LSB of descriptor length,and the address of the Descriptor */
	if(!Write_SX2reg(SX2_DESC, (unsigned int)length))
	{
		return FALSE;
	}

	/* write high nibble of MSB of descriptor length */
	SX2_comwritebyte((unsigned char)(length >> 12));

	/* write low nibble of MSB of descriptor length */
	SX2_comwritebyte((unsigned char)((length & 0x0F00)>>8));
	
	for(i=0; i<length; i++)
	{
		/* write high nibble of MSB of descriptor length */
		SX2_comwritebyte((desc[i] >> 4));
		/* write low nibble of MSB of descriptor length */
		SX2_comwritebyte((desc[i] & 0x0F));
	}

	return TRUE;
}

/**********************************************************************************/
/*	Function: Write_SX2reg														  */
/*	Purpose:  Writes to a SX2 register											  */
/*	Input:	  addr  - address of register										  */
/*			  value - value to write to address									  */
/*	Output:	  TRUE  on success													  */
/*			  FALSE on failure													  */
/**********************************************************************************/
BOOL Write_SX2reg(unsigned char addr, unsigned int value)
{
	unsigned int transovertime = 0 ;
	/*clear the high two bit of the addr*/
	addr = addr & 0x3f;
	/* write register address to the SX2 */
	if(!SX2_comwritebyte(0x80 | addr))
	{
		return FALSE;
	}
	/* write high nibble of register data */
	SX2_comwritebyte((value >> 4) & 0xF);
	/* write low nibble of register data */
	SX2_comwritebyte(value & 0x0F);
	/*wait the ready is ok*/
	transovertime = 0;
	while((*USB_STS & 0x08) == 0 )
	{
		if( transovertime++ > usbtimeout )
		{
			return FALSE;
		}
	}
	/*the write is ok*/
	return TRUE;
}

/**********************************************************************************/
/*	Function: SX2_comwritebyte													  */
/*	Purpose:  Writes to a SX2 command interface									  */
/*	Input:	  value - value to write to address									  */
/*	Output:	  TRUE  on success													  */
/*			  FALSE on failure													  */
/**********************************************************************************/
BOOL SX2_comwritebyte(unsigned int value)
{
	unsigned int time_count = 0;
	/*wait the ready is ok*/
	while((*USB_STS & 0x08) ==0 )
	{
		if( time_count++ > usbtimeout )
		{
			return FALSE;
		}
	}
	*USB_COMMAND = value;
	/*the write is ok*/
	return TRUE;
}

/**********************************************************
*
*	Function: Read_SX2reg
*	Purpose:  Reads a SX2 register
*	Input:	  addr  - address of register
*			  value - value read from register
*	Output:	  TRUE  on success
*			  FALSE on failure
*
**********************************************************/

BOOL Read_SX2reg(unsigned char addr, unsigned int *value)
{
	unsigned int transovertime = 0;
	/*READY是否準備好，延時時間到，返回*/
	while((*USB_STS & 0x08) == 0 )
	{
		if( transovertime++ > usbtimeout )
		{
			return FALSE;
		}
	}
	/*clear the high two bit of the addr*/
	addr = addr & 0x3f;
	/* write 'read register' command to SX2 */
	*USB_COMMAND = 0xC0 | addr;

	/* set read flag to indicate to the interrupt routine that we
	   are expecting an interrupt to read back the contents of the
	   addressed register. The interrupt latency of the SX2 is in
	   tens of microseconds, so it's safe to write this flag after
	   the initial 'read' byte is written.  */
	/*設置讀標志，通知中斷程序不做處理讀中斷，只要返回標志為假就可以了*/
	readFlag = 1;

	/* wait for read flag to be cleared by an interrupt */
	/*等待讀標志為假*/
	while(1)
	{
		if(readFlag == 0)
		{
			break;
		}
		else
		{
			transovertime = 0;
		}
	}
	
	/*wait the ready is ok*/
	while((*USB_STS & 0x08) == 0 )
	{
		if( transovertime++ > usbtimeout )
		{
			return FALSE;
		}
	}
	/*讀取寄存器的數(shù)據(jù)*/
	*value = *USB_COMMAND;
	return TRUE;
}

/*********************************************************/
/*                                                       */
/*	Function: SX2_FifoWrite                              */
/*	Purpose:  write buffer to sx2fifo                    */
/*	Input:	  channel,the endpoint you select			 */
/*			  pdata - the pointer to databuffer			 */
/*			  longth - the longth of the databuffer      */
/*	Output:	  TRUE  on success                           */
/*			  FALSE on failure							 */
/*														 */
/*********************************************************/

BOOL SX2_FifoWrite(int channel,unsigned int *pdata,unsigned length)
{
	unsigned int i = 0;
		if(channel == ENDPOINT2)
		{
			for(i = 0;i<length;i++)
			{
				*USB_FIFO2 = pdata[i];
			}
		}
		else if(channel == ENDPOINT4)
		{
			for(i = 0;i<length;i++)
			{
				*USB_FIFO4 = pdata[i];
			}
		}
		else if(channel == ENDPOINT6)
		{
			for(i = 0;i<length;i++)
			{
				*USB_FIFO6 = pdata[i];  
			} 
		}
		else if(channel == ENDPOINT8)
		{
			for(i = 0;i<length;i++)
			{
				*USB_FIFO8 = pdata[i]; 
			}
		}
/*		if(!SX2_FifoWriteSingle(channel,pdata[i]))
		{
			return FALSE;
		}*/
	return TRUE;	
}

BOOL SX2_FifoWriteSingle(int channel1,unsigned int pdata1)
{
	if(channel1 == ENDPOINT2)
	{
		*USB_FIFO2 = pdata1;
		return(TRUE);
	}
	else if(channel1 == ENDPOINT4)
	{
		*USB_FIFO4 = pdata1;
		return(TRUE);
	}
	else if(channel1 == ENDPOINT6)
	{
		*USB_FIFO6 = pdata1;   
		return(TRUE);
	}
	else if(channel1 == ENDPOINT8)
	{
		*USB_FIFO8 = pdata1;
		return(TRUE);
	}
	return(FALSE);
}

unsigned int SX2_FifoReadSingle(int channel1)
{
	unsigned int pdata1;
	if(channel1 == ENDPOINT2)
	{
		pdata1 = *USB_FIFO2;
	}
	else if(channel1 == ENDPOINT4)
	{
		pdata1 = *USB_FIFO4;
	}
	else if(channel1 == ENDPOINT6)
	{
		pdata1 = *USB_FIFO6;   
	}
	else if(channel1 == ENDPOINT8)
	{
		pdata1 = *USB_FIFO8;
	}
	return(pdata1);
}

interrupt void XINT2_ISR_A(void)
{
		/* during a read, an interrupt occurs after the host 
	   CPU requests a register value to read. The host CPU 
	   then reads the data from the SX2 */
		if(readFlag == 1)
		{
			readFlag = 0;
		}
	/* setup's are a special case. Whenever we get a setup 
	   the next eight interrupts represent the data of the
	   setup packet */
		else if(setupDat)
		{
			/* read the setup data */
			setupBuff[setupCnt++] = *USB_COMMAND;

			/* stop when we have collected eight bytes */
			if(setupCnt > 7)
			{
				setupDat = FALSE;
				sx2Setup = TRUE;
			}
			else
			{
				*USB_COMMAND = 0xC0 | SX2_SETUP;
			}
	     	}
		    /* if this is a new request, then we have to read the
		 value and parse the interrupt value. The value 
		 can't be parsed in the main loop, otherwise we could
		 get two interrupts back to back and trash the first 
		 one in the series. */
		 else
		 {
			/* read the interrupt register value */
			irqValue = *USB_COMMAND;

			switch(irqValue)
			{
				case SX2_INT_SETUP:
					/* endpoint 0 setup */
					/* next eight interrupts are setup data */
					/* parse the interrupt register value */		
					setupDat = TRUE;			
					setupCnt = 0;
					/* send read register command to SX2 */
					*USB_COMMAND = 0xC0 | SX2_SETUP;
					break;
		
				case SX2_INT_EP0BUF:
					/* endpoint 0 ready */
					sx2EP0Buf = TRUE;
					break;
		
				case SX2_INT_FLAGS:
					/* FIFO flags -FF,PF,EF */
					FLAGS_READ = TRUE;
					break;
		
				case SX2_INT_ENUMOK:
					/* enumeration successful */
					sx2EnumOK = TRUE;
					break;
		
				case SX2_INT_BUSACTIVITY:
					/* detected either an absence or resumption of activity on the USB bus.	 */
					/* Indicates that the host is either suspending or resuming or that a 	 */
					/* self-powered device has been plugged into or unplugged from the USB.	 */
					/* If the SX2 is bus-powered, the host processor should put the SX2 into */ 
					/* a low-power mode after detecting a USB suspend condition.			 */
					sx2BusActivity = TRUE;
					break;
				case SX2_INT_READY:
					/* awakened from low power mode via wakeup pin */
					/* or completed power on self test */
					sx2Ready = TRUE;
					break;
		
				default:
					break;
			}
	  	}
	PieCtrl.PIEACK.bit.ACK1 = 1;
	EINT;
}