# Reading F:/Program Files/modelsim/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.1f May 12 2006 
# //
# //  Copyright 2006 Mentor Graphics Corporation
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# do ymq_ymqaaa_vhd_tb.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 6.1f Compiler 2006.05 May 12 2006
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity ymq
# -- Compiling architecture behavioral of ymq
# Model Technology ModelSim SE vcom 6.1f Compiler 2006.05 May 12 2006
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package numeric_std
# -- Compiling entity ymq_ymqaaa_vhd_tb
# -- Compiling architecture behavior of ymq_ymqaaa_vhd_tb
# vsim -lib work -t 1ps ymq_ymqaaa_vhd_tb 
# Loading f:\program files\modelsim\win32/../std.standard
# Loading f:\program files\modelsim\win32/../ieee.std_logic_1164(body)
# Loading f:\program files\modelsim\win32/../ieee.numeric_std(body)
# Loading work.ymq_ymqaaa_vhd_tb(behavior)
# Loading f:\program files\modelsim\win32/../ieee.std_logic_arith(body)
# Loading f:\program files\modelsim\win32/../ieee.std_logic_unsigned(body)
# Loading work.ymq(behavioral)
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
# .main_pane.workspace
# .main_pane.signals.interior.cs
run