?? jejudov2.opj
字號:
(ExpressProject ""
(ProjectVersion "19981106")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library")
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
(NoModify)
(DRC_Scope "0")
(DRC_Action "1")
(DRC_Create_Warnings "TRUE")
(DRC_Check_Ports "TRUE")
(DRC_Check_Off-Page_Connectors "TRUE")
(DRC_Identical_References "TRUE")
(DRC_Type_Mismatch "TRUE")
(DRC_Report_Ports_and_Off-page_Connectors "TRUE")
(DRC_SDT_Compatibility "TRUE")
(DRC_Report_Off-grid_Objects "TRUE")
(DRC_Check_Unconnected_Wires "TRUE")
(DRC_Report_Netnames "TRUE")
(DRC_View_Output "TRUE")
(DRC_Report_File "L:\produits\8051\chejudo2\DemobV2.2\jejudov2.drc")
(File ".\jejudov2.dsn"
(Type "Schematic Design")))
(Folder "Outputs"
(File ".\jejudov2.drc"
(Type "Report")))
(Folder "Referenced Projects")
(GlobalState
(FileView
(Path "Design Resources")
(Path "Design Resources"
"l:\products\micros\c51\chejudo2\start~po\demob~em\hw\jejudov2.dsn")
(Path "Design Resources"
"l:\products\micros\c51\chejudo2\start~po\demob~em\hw\jejudov2.dsn"
"SCHEMATIC1")
(Path "Outputs")
(Select "Design Resources"
"l:\products\micros\c51\chejudo2\start~po\demob~em\hw\jejudov2.dsn"
"SCHEMATIC1" "PAGE1"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 0 750 -1 -1 497 752 88 524"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 2 3 -1 -1 -1 -1 44 950 44 572")
(Scroll "0 450")
(Zoom "100")
(Occurrence "/"))
(Path "L:\PRODUCTS\MICROS\C51\CHEJUDO2\START~PO\DEMOB~EM\HW\JEJUDOV2.DSN")
(Schematic "SCHEMATIC1")
(Page "PAGE1"))))
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