/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES.                                             */
/*                 (C) Fujitsu Microelectronics Europe GmbH                  */
/*---------------------------------------------------------------------------
  MAIN.C
  - description
  - See README.TXT for project description and disclaimer.

/*---------------------------------------------------------------------------*/

#include "mb90425.h"

/* Note:
   The -A and -B versions include a CPU Detection Reset Circuit. 
   This must be cleared periodically to prevent program reset.

   The conditions for clearing the counter of this circuit are given below:
   1. Writing 0 to CL bit of LVRC register
   2. Internal reset
   3. Stopping main oscillation clock
   4. Transition to sleep mode
   5. Transition to time-base timer mode or timer mode
   6. Starting hold
*/

void clear_CPU_operation_detection (void)
{
 LVRC = 0x35;	        /* clears CPU operation detection */
}

/*---------------------------------------------------------------------------
  #Defines
/*---------------------------------------------------------------------------*/

/*---------------------------------------------------------------------------
  Globals
/*---------------------------------------------------------------------------*/

unsigned long l;

/*---------------------------------------------------------------------------
  ADC-Routines
/*---------------------------------------------------------------------------*/

void Init_ADC(void)
{
  DDR6  = 0x00;     /* Analog-Port is input */
  ADER  = 0xFF;     /* Analog input enable  */
  ADCRH = 0xA8;		/* 8-Bit resolution     */
  ADCSL = 0x87;     /* Continous conversion mode, start-channel 0, end-channel 7 */
//  ADCSL = 0x07;     /* Single conversion mode, start-channel 0, end-channel 7 */
  ADCSH = 0xA2;		/* enable interrupt, software activation */
}

/*---------------------------------------------------------------------------
  Interrupts
/*---------------------------------------------------------------------------*/
__interrupt void irq_ADC (void)
{
  PDR4 = ~(
              (ADCRL & 0xf0)            // Put upper nibble of result to LED7..4
            + ((ADCSL_ANS-1) & 0x07)    // Put channel to LED3..0
           );                           // ANS always shows next channel, therefore -1
  for (l=0; l<500000; l++)
    clear_CPU_operation_detection ();
  ADCSH = 0xA0;		/* enable interrupt, clear IRQ-Flag */
}


/*---------------------------------------------------------------------------
  MAIN.C
/*---------------------------------------------------------------------------*/

void main(void)
{
  InitIrqLevels();
  __set_il(7);                /* allow all levels */
  __EI();                     /* globaly enable interrupts */

  clear_CPU_operation_detection ();
  
  PDR4 = 0xff;                /* all LEDs off */
  DDR4 = 0xff;               
  
  Init_ADC();		      /* initialize ADC */
    
  while(1)
  {		
   	clear_CPU_operation_detection();
  }
}