/* mmuPro36Lib.c - MMU library for PentiumPro/2/3/4 36 bit mode *//* Copyright 1984-2002 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01i,23may02,hdn  aligned PT/DT at mmuPageSize boundary for 4K/2MB page size		 imported updates from mmuPro32Lib.c01h,16may02,hdn  moved the GDT reloading to sysPhysMemTop() in sysLib.c01g,27aug01,hdn  made MMU_TLB_FLUSH, updated MMU_LOCK/MMU_UNLOCK macros.		 initialized oldIntLev to shut off warnings.01f,09feb99,wsl  add comment to document ERRNO value01e,17sep98,hdn  renamed mmuEnabled to mmuPro36Enabled.01d,13apr98,hdn  added support for 4KB/2MB page for PentiumPro w PAE.01c,07jan95,hdn  re-initialized the GDT in mmuLibInit().01b,01nov94,hdn  added a support for COPY_BACK cache mode for Pentium.01a,26jul93,hdn  written based on mc68k's version.*//*DESCRIPTION:mmuPro36Lib.c provides the architecture dependent routines that directly controlthe memory management unit.  It provides 10 routines that are called by thehigher level architecture independent routines in vmLib.c:  mmuPro36LibInit() - initialize module mmuTransTblCreate() - create a new translation table mmuTransTblDelete() - delete a translation table. mmuPro36Enable() - turn MMU on or off mmuStateSet() - set state of virtual memory page mmuStateGet() - get state of virtual memory page mmuPageMap() - map physical memory page to virtual memory page mmuGlobalPageMap() - map physical memory page to global virtual memory page mmuTranslate() - translate a virtual address to a physical address mmuCurrentSet() - change active translation tableApplications using the MMU will never call these routines directly; the visible interface is supported in vmLib.c.mmuLib supports the creation and maintenance of multiple translation tables,one of which is the active translation table when the MMU is enabled.  Note that VxWorks does not include a translation table as part of the taskcontext;  individual tasks do not reside in private virtual memory.  However,we include the facilities to create multiple translation tables so thatthe user may create "private" virtual memory contexts and switch them in anapplication specific manner.  Newtranslation tables are created with a call to mmuTransTblCreate(), and installedas the active translation table with mmuCurrentSet().  Translation tablesare modified and potentially augmented with calls to mmuPageMap() and mmuStateSet().The state of portions of the translation table can be read with calls to mmuStateGet() and mmuTranslate().The traditional VxWorks architecture and design philosophy requires that allobjects and operating systems resources be visible and accessible to all agents(tasks, isrs, watchdog timers, etc) in the system.  This has traditionally beeninsured by the fact that all objects and data structures reside in physical memory; thus, a data structure created by one agent may be accessed by anyother agent using the same pointer (object identifiers in VxWorks are oftenpointers to data structures.) This creates a potential problem if you have multiple virtual memory contexts.  For example, if asemaphore is created in one virtual memory context, you must guarantee thatthat semaphore will be visible in all virtual memory contexts if the semaphoreis to be accessed at interrupt level, when a virtual memory context other thanthe one in which it was created may be active. Another example is thatcode loaded using the incremental loader from the shell must be accessiblein all virtual memory contexts, since code is shared by all agents in thesystem.This problem is resolved by maintaining a global "transparent" mappingof virtual to physical memory for all the contiguous segments of physical memory (on board memory, i/o space, sections of vme space, etc) that is sharedby all translation tables;  all available  physical memory appears at the same address in virtual memory in all virtual memory contexts. This technique provides an environment that allowsresources that rely on a globally accessible physical address to run withoutmodification in a system with multiple virtual memory contexts.An additional requirement is that modifications made to the state of global virtual memory in one translation table appear in all translation tables.  Forexample, memory containing the text segment is made read only (to avoidaccidental corruption) by setting the appropriate writable bits in the translation table entries corresponding to the virtual memory containing the text segment.  This state information must be shared by all virtual memory contexts, so that no matter what translation table is active, the text segmentis protected from corruption.  The mechanism that implements this feature isarchitecture dependent, but usually entails building a section of a translation table that corresponds to the global memory, that is shared byall other translation tables.  Thus, when changes to the state of the globalmemory are made in one translation table, the changes are reflected in allother translation tables.mmuLib provides a separate call for constructing global virtual memory -mmuGlobalPageMap() - which creates translation table entries that are sharedby all translation tables.  Initialization code in usrConfig makes callsto vmGlobalMap() (which in turn calls mmuGlobalPageMap()) to set up global transparent virtual memory for allavailable physical memory.  All calls made to mmuGlobalPageMap() must occur before any virtual memory contexts are created;  changes made to global virtualmemory after virtual memory contexts are created are not guaranteed to be reflected in all virtual memory contexts.Most MMU architectures will dedicate some fixed amount of virtual memory to a minimal section of the translation table (a "segment", or "block").  This creates a problem in that the user may map a small section of virtual memoryinto the global translation tables, and then attempt to use the virtual memoryafter this section as private virtual memory.  The problem is that the translation table entries for this virtual memory are contained in the global translation tables, and are thus shared by all translation tables.  This condition is detected by vmMap, and an error is returned, thus, the lowerlevel routines in mmuPro36Lib.c (mmuPageMap(), mmuGlobalPageMap()) need not perform any error checking.A global variable `mmuPageBlockSize' should be defined which is equal to the minimum virtual segment size.  This module supports the PentiumPro/2/3/4 MMU:.CS	    PDBR	     |	     |            -------------------------            |pdp  |pdp  |pdp  |pdp  |            -------------------------	     |             v            ------------------------------------- top level  |pde  |pde  |pde  |pde  |pde  |pde  | ...             -------------------------------------	       |     |     |     |     |     |    	       |     |     |     |     |     |          ----------     |     v     v     v     v      |         ------    NULL  NULL  NULL  NULL      |         |      v         v     ----     ----   l   |pte |   |pte |o    ----     ----w   |pte |   |pte |     e    ----     ----r   |pte |   |pte |l    ----     ----e   |pte |   |pte |v    ----     ----e     .         .l     .         .      .         ..CEwhere the top level consists of two tables that are the page directorypointer table and the page directory table which is an array of pointers (Page Directory Entry) held within a single 4k page.  These point to arrays of Page Table Entry arrays in the lower level.  Each of these lower level arrays is also held within a single 4k page, and describes a virtual space of 2 MB (each Page Table Entry is 8 bytes, so we get 512 of these in each array, and each Page Table Entry maps a 4KB page - thus 512 * 4096 = 2MB.)  To implement global virtual memory, a separate translation table called mmuGlobalTransTbl is created when the module is initialized.  Calls to mmuGlobalPageMap will augment and modify this translation table.  When newtranslation tables are created, memory for the top level array of sftd's isallocated and initialized by duplicating the pointers in mmuGlobalTransTbl'stop level sftd array.  Thus, the new translation table will use the globaltranslation table's state information for portions of virtual memory that aredefined as global.  Here's a picture to illustrate:.CS	         GLOBAL TRANS TBL		      NEW TRANS TBL 		       PDBR				   PDBR		        |				    |		        |				    |            -------------------------           -------------------------            |pdp  |pdp  |pdp  |pdp  |           |pdp  |pdp  |pdp  |pdp  |            -------------------------           -------------------------	     |                                   |             v                                   v            -------------------------           ------------------------- top level  |pde  |pde  | NULL| NULL|           |pde  |pde  | NULL| NULL|            -------------------------           -------------------------	       |     |     |     |                 |     |     |     |   	       |     |     |     |                 |     |     |     |        ----------     |     v     v        ----------     |     v     v      |         ------    NULL  NULL      |		 |    NULL  NULL      |         |			  |		 |      o------------------------------------		 |      |		|					 |      |		o-----------------------------------------      |		|      v         v     ----     ----   l   |pte |   |pte |o    ----     ----w   |pte |   |pte |     e    ----     ----r   |pte |   |pte |l    ----     ----e   |pte |   |pte |v    ----     ----e     .         .l     .         .      .         ..CENote that with this scheme, the global memory granularity is 4MB.  Each timeyou map a section of global virtual memory, you dedicate at least 4MB of the virtual space to global virtual memory that will be shared by all virtualmemory contexts.The physical memory that holds these data structures is obtained from thesystem memory manager via memalign to insure that the memory is pagealigned.  We want to protect this memory from being corrupted,so we invalidate the descriptors that we set up in the global translationthat correspond to the memory containing the translation table data structures.This creates a "chicken and the egg" paradox, in that the only way we canmodify these data structures is through virtual memory that is now invalidated,and we can't validate it because the page descriptors for that memory arein invalidated memory (confused yet?)So, you will notice that anywhere that page table descriptors (PTE's)are modified, we do so by locking out interrupts, momentarily disabling the MMU, accessing the memory with its physical address, enabling the MMU, andthen re-enabling interrupts (see mmuStateSet(), for example.)Support for two new page attribute bits are added for PentiumPro's enhancedMMU.  They are Global bit (G) and Page-level write-through/back bit (PWT).Global bit indicates a global page when set.  When a page is marked global andthe page global enable (PGE) bit in register CR4 is set, the page-table orpage-directory entry for the page is not invalidated in the TLB when registerCR3 is loaded or a task switch occurs.  This bit is provided to preventfrequently used pages (such as pages that contain kernel or other operatingsystem or executive code) from being flushed from the TLB.Page-level write-through/back bit (PWT) controls the write-through or write-back caching policy of individual pages or page tables.  When the PWT bit isset, write-through caching is enabled for the associated page or page table.When the bit is clear, write-back caching is enabled for the associated pageand page table.Following macros are used to describe these attribute bits in the physicalmemory descriptor table sysPhysMemDesc[] in sysLib.c. VM_STATE_WBACK - use write-back cache policy for the page  VM_STATE_WBACK_NOT - use write-through cache policy for the page  VM_STATE_GLOBAL - set page global bit VM_STATE_GLOBAL_NOT - not set page global bitSupport for two page size (4KB and 2MB) are added also.The linear address for 4KB pages is divided into four sections: Page directory pointer - bits 30 through 31. Page directory entry - bits 21 through 29. Page table entry - Bits 12 through 20. Page offset - Bits  0 through 11.The linear address for 2MB pages is divided into three sections: Page directory pointer - bits 30 through 31. Page directory entry - Bits 21 through 29. Page offset - Bits  0 through 20.These two page size is configurable by VM_PAGE_SIZE macro in config.h.*//* includes */#include "vxWorks.h"#include "string.h"#include "intLib.h"#include "stdlib.h"#include "memLib.h"#include "private/vmLibP.h"#include "arch/i86/mmuPro36Lib.h"#include "arch/i86/vxI86Lib.h"#include "mmuLib.h"#include "errno.h"#include "cacheLib.h"#include "regs.h"#include "sysLib.h"/* defines *//* * MMU_WP_UNLOCK and MMU_WP_LOCK are used to access page table entries that * are in virtual memory that has been invalidated to protect it from being * corrupted.  The write protection bit is toggled to stay in the virtual * address space. * MMU_UNLOCK and MMU_LOCK are used to allocate memory for Directory/Page * Table from the initial system memory in the 1st 32 bit physical address * space. Thus, for all the Directory/Page Tables', the upper 4 bits of  * 36 bit physical address becomes zero.  This makes this library simple. * Allocated memory can be freed from the virtual address space * assuming the transparent mapping of the initial system memory. * These four macros do not invoke function calls. Therefore, we do not  * need to worry about stack mismatch in the virtual/physical address  * space, or the called out function's disappearance.  It is guaranteed  * that this code is in physical memory. */#define MMU_ON() \    do { int tempReg; WRS_ASM ("movl %%cr0,%0; orl $0x80010000,%0; \    movl %0,%%cr0; jmp 0f; 0:" : "=r" (tempReg) : : "memory"); } while (0)#define MMU_OFF() \    do { int tempReg; WRS_ASM ("movl %%cr0,%0; andl $0x7ffeffff,%0; \    movl %0,%%cr0; jmp 0f; 0:" : "=r" (tempReg) : : "memory"); } while (0)#define MMU_UNLOCK(wasEnabled, oldLevel) \    do { if (((wasEnabled) = mmuPro36Enabled) == TRUE) \	{INT_LOCK (oldLevel); MMU_OFF (); } \    } while (0)#define MMU_LOCK(wasEnabled, oldLevel) \    do { if ((wasEnabled) == TRUE) \        {MMU_ON (); INT_UNLOCK (oldLevel);} \    } while (0)#define WP_ON() \    do { int tempReg; WRS_ASM ("movl %%cr0,%0; orl $0x00010000,%0; \    movl %0,%%cr0; jmp 0f; 0:" : "=r" (tempReg) : : "memory"); } while (0)#define WP_OFF() \    do { int tempReg; WRS_ASM ("movl %%cr0,%0; andl $0xfffeffff,%0; \    movl %0,%%cr0; jmp 0f; 0:" : "=r" (tempReg) : : "memory"); } while (0)#define MMU_WP_UNLOCK(wasEnabled, oldLevel) \    do { if (((wasEnabled) = mmuPro36Enabled) == TRUE) \	{INT_LOCK (oldLevel); WP_OFF (); } \    } while (0)#define MMU_WP_LOCK(wasEnabled, oldLevel) \    do { if ((wasEnabled) == TRUE) \        {WP_ON (); INT_UNLOCK (oldLevel);} \    } while (0)/* inline version of mmuI86TLBFlush() */#define	MMU_TLB_FLUSH() \    do { int tempReg; WRS_ASM ("pushfl; cli; movl %%cr3,%0; \    movl %0,%%cr3; jmp 0f; 0: popfl; " : "=r" (tempReg) : : "memory"); \    } while (0)/* imports */IMPORT STATE_TRANS_TUPLE * mmuStateTransArray;IMPORT int	mmuStateTransArraySize;IMPORT MMU_LIB_FUNCS mmuLibFuncs;IMPORT int	mmuPageBlockSize;IMPORT int	sysProcessor;IMPORT CPUID	sysCpuId;/* globals */BOOL		mmuPro36Enabled = FALSE;/* locals */LOCAL UINT32	mmuPageSize;LOCAL UINT32	mmuPdpTableNumEnt = 4;LOCAL BOOL	firstTime = TRUE;LOCAL UINT32	nDirPages = 0;	/* number of pages for Directory Table *//*  * a translation table to hold the descriptors for the global transparent * translation of physical to virtual memory  */LOCAL MMU_TRANS_TBL mmuGlobalTransTbl;/* initially, the current trans table is a dummy table with mmu disabled */LOCAL MMU_TRANS_TBL * mmuCurrentTransTbl = &mmuGlobalTransTbl;/*  * array of booleans used to keep track of sections of virtual memory  * defined as global. */LOCAL UINT8 * globalPageBlock;LOCAL STATE_TRANS_TUPLE mmuStateTransArrayLocal [] =    {    {VM_STATE_MASK_VALID, MMU_STATE_MASK_VALID,      VM_STATE_VALID, MMU_STATE_VALID},    {VM_STATE_MASK_VALID, MMU_STATE_MASK_VALID,      VM_STATE_VALID_NOT, MMU_STATE_VALID_NOT},    {VM_STATE_MASK_WRITABLE, MMU_STATE_MASK_WRITABLE,     VM_STATE_WRITABLE, MMU_STATE_WRITABLE},    {VM_STATE_MASK_WRITABLE, MMU_STATE_MASK_WRITABLE,     VM_STATE_WRITABLE_NOT, MMU_STATE_WRITABLE_NOT},    {VM_STATE_MASK_CACHEABLE, MMU_STATE_MASK_CACHEABLE,     VM_STATE_CACHEABLE, MMU_STATE_CACHEABLE},    {VM_STATE_MASK_CACHEABLE, MMU_STATE_MASK_CACHEABLE,     VM_STATE_CACHEABLE_NOT, MMU_STATE_CACHEABLE_NOT},    {VM_STATE_MASK_WBACK, MMU_STATE_MASK_WBACK,     VM_STATE_WBACK, MMU_STATE_WBACK},    {VM_STATE_MASK_WBACK, MMU_STATE_MASK_WBACK,     VM_STATE_WBACK_NOT, MMU_STATE_WBACK_NOT},    {VM_STATE_MASK_GLOBAL, MMU_STATE_MASK_GLOBAL,     VM_STATE_GLOBAL, MMU_STATE_GLOBAL},    {VM_STATE_MASK_GLOBAL, MMU_STATE_MASK_GLOBAL,     VM_STATE_GLOBAL_NOT, MMU_STATE_GLOBAL_NOT}    };/* forward declarations */ LOCAL void	mmuMemPagesWriteDisable (MMU_TRANS_TBL * transTbl);LOCAL STATUS	mmuPteGet (MMU_TRANS_TBL * pTransTbl, void * virtAddr,			   PTE ** result);LOCAL MMU_TRANS_TBL * mmuTransTblCreate ();LOCAL STATUS	mmuTransTblInit (MMU_TRANS_TBL * newTransTbl);LOCAL STATUS	mmuTransTblDelete (MMU_TRANS_TBL * transTbl);LOCAL STATUS	mmuVirtualPageCreate (MMU_TRANS_TBL * thisTbl,				      void * virtPageAddr);LOCAL STATUS	mmuStateSet (MMU_TRANS_TBL * transTbl, void * pageAddr,			     UINT stateMask, UINT state);LOCAL STATUS	mmuStateGet (MMU_TRANS_TBL * transTbl, void * pageAddr,			     UINT * state);LOCAL STATUS	mmuPageMap (MMU_TRANS_TBL * transTbl, void * virtAddr,			    void * physPage);LOCAL STATUS	mmuGlobalPageMap (void * virtAddr, void * physPage);LOCAL STATUS	mmuTranslate (MMU_TRANS_TBL * transTbl, void * virtAddr,			      void ** physAddr);LOCAL void	mmuCurrentSet (MMU_TRANS_TBL * transTbl);LOCAL MMU_LIB_FUNCS mmuLibFuncsLocal =    {    mmuPro36LibInit,    mmuTransTblCreate,    mmuTransTblDelete,    mmuPro36Enable,       mmuStateSet,    mmuStateGet,    mmuPageMap,    mmuGlobalPageMap,    mmuTranslate,