** NOMANUAL*/void _dbgTraceDisable (void)    {    /* already disabled in dbgTraceStub */    }/********************************************************************************* getOneReg - return the contents of one register** Given a task's ID, this routine returns the contents of the register* specified by the register code.  This routine is used by `a0', `d0', `sr',* etc.  The register codes are defined in dbgMc68kLib.h.** RETURNS: register contents, or ERROR.*/LOCAL int getOneReg (taskId, regCode)    int		taskId;		/* task's id, 0 means default task */    int		regCode;	/* code for specifying register */    {    REG_SET	regSet;		/* get task's regs into here */    taskId = taskIdFigure (taskId);	/* translate super name to id */    if (taskId == ERROR)		/* couldn't figure out super name */	return (ERROR);    taskId = taskIdDefault (taskId);	/* set the default id */    if (taskRegsGet (taskId, &regSet) != OK)	return (ERROR);    switch (regCode)	{	case D0: return (regSet.dataReg [0]);	/* data registers */	case D1: return (regSet.dataReg [1]);	case D2: return (regSet.dataReg [2]);	case D3: return (regSet.dataReg [3]);	case D4: return (regSet.dataReg [4]);	case D5: return (regSet.dataReg [5]);	case D6: return (regSet.dataReg [6]);	case D7: return (regSet.dataReg [7]);	case A0: return (regSet.addrReg [0]);	/* address registers */	case A1: return (regSet.addrReg [1]);	case A2: return (regSet.addrReg [2]);	case A3: return (regSet.addrReg [3]);	case A4: return (regSet.addrReg [4]);	case A5: return (regSet.addrReg [5]);	case A6: return (regSet.addrReg [6]);	case A7: return (regSet.addrReg [7]);	/* a7 is the stack pointer */	case SR: return (regSet.sr);	}    return (ERROR);		/* unknown regCode */    }/********************************************************************************* a0 - return the contents of register `a0' (also `a1' - `a7') (MC680x0)** This command extracts the contents of register `a0' from the TCB of a specified* task.  If <taskId> is omitted or zero, the last task referenced is assumed.** Similar routines are provided for all address registers (`a0' - `a7'):* a0() - a7().** The stack pointer is accessed via a7().** RETURNS: The contents of register `a0' (or the requested register).** SEE ALSO:* .pG "Target Shell"*/int a0    (    int taskId		/* task ID, 0 means default task */    )    {    return (getOneReg (taskId, A0));    }int a1 (taskId) int taskId; { return (getOneReg (taskId, A1)); }int a2 (taskId) int taskId; { return (getOneReg (taskId, A2)); }int a3 (taskId) int taskId; { return (getOneReg (taskId, A3)); }int a4 (taskId) int taskId; { return (getOneReg (taskId, A4)); }int a5 (taskId) int taskId; { return (getOneReg (taskId, A5)); }int a6 (taskId) int taskId; { return (getOneReg (taskId, A6)); }int a7 (taskId) int taskId; { return (getOneReg (taskId, A7)); }/********************************************************************************* d0 - return the contents of register `d0' (also `d1' - `d7') (MC680x0)** This command extracts the contents of register `d0' from the TCB of a specified* task.  If <taskId> is omitted or zero, the last task referenced is assumed.** Similar routines are provided for all data registers (`d0' - `d7'):* d0() - d7().** RETURNS: The contents of register `d0' (or the requested register).** SEE ALSO:* .pG "Target Shell"*/int d0    (    int taskId		/* task ID, 0 means default task */    )    {    return (getOneReg (taskId, D0));    }int d1 (taskId) int taskId; { return (getOneReg (taskId, D1)); }int d2 (taskId) int taskId; { return (getOneReg (taskId, D2)); }int d3 (taskId) int taskId; { return (getOneReg (taskId, D3)); }int d4 (taskId) int taskId; { return (getOneReg (taskId, D4)); }int d5 (taskId) int taskId; { return (getOneReg (taskId, D5)); }int d6 (taskId) int taskId; { return (getOneReg (taskId, D6)); }int d7 (taskId) int taskId; { return (getOneReg (taskId, D7)); }/********************************************************************************* sr - return the contents of the status register (MC680x0, SH)** This command extracts the contents of the status register from the TCB of a* specified task.  If <taskId> is omitted or zero, the last task referenced is* assumed.** RETURNS: The contents of the status register.** SEE ALSO:* .pG "Target Shell"*/int sr    (    int taskId		/* task ID, 0 means default task */    )    {    return (getOneReg (taskId, SR));    }/* dbgArchLib.c - SPARC-dependent debugger library */  /* Copyright 1984-1995 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01i,10feb95,jdi  doc cleanup for 5.2.01i,13feb93,jdi  documentation cleanup for 5.1; created discrete entries for<                register routines.01h,09feb92,yao  pulled in register show routines from 5.0.01g,15oct92,jwt  cleaned up ANSI compiler warnings.01f,01oct92,yao  removed redundant delcaration for _dbgStepAdd().		 changed to pass pointer to information and registers		 saved on stack to _dbgStepAdd().01e,23aug92,jcf  changed filename.01d,15jul92,jwt  moved fsrShow() to dbgSparcLib.c - scalable kernel.01c,06jul92,yao  removed dbgArchCacheClear(). made user uncallable globals		 started with '_'.01b,03jul92,jwt  converted to 5.1 cache library support; cleanup;                 added more Fujitsu chips to psrShow().01a,18jun92,yao  written based on sparc/dbgLib.c ver2f.*//*DESCRIPTIONThis module provides the SPARC specific support functions for dbgLib.NOMANUAL*/#include "vxWorks.h"#include "private/dbgLibP.h"#include "taskLib.h"#include "fppLib.h"#include "taskArchLib.h"#include "intLib.h"#include "regs.h"#include "arch/sparc/psl.h"#include "iv.h"#include "cacheLib.h"#include "ioLib.h"#include "dsmLib.h"#include "vxLib.h"#include "stdio.h"#include "usrLib.h"LOCAL void fsrExcShow ();void fsrShow ();/* interrupt driver routines from dbgALib.s */IMPORT dbgBpStub ();		/* breakpoint interrupt driver */IMPORT int dsmNbytes ();IMPORT int dsmInst ();/* globals */char * _archHelp_msg =    "i0-i7,l0-l7,o0-o7,g1-g7,\n"    "pc,npc,psr,wim,y  [task]        Display a register of a task\n"    "psrShow   value                 Display meaning of psr value\n";LOCAL oldIntLevel;		/* old interrupt level *//********************************************************************************* _dbgArchInit - architecture dependent initialization routine** This routine initialize global function pointers that are architecture * specific.** RETURNS: N/A** NOMANUAL*/void _dbgArchInit (void)    {    _dbgDsmInstRtn = (FUNCPTR) dsmInst;    }/********************************************************************************* _dbgVecInit - insert new breakpoint and trace vectors** RETURNS: N/A** NOMANUAL*/void _dbgVecInit (void)        {    /* insert the new breakpoint and trace vectors */    intVecSet ((FUNCPTR *) TRAPNUM_TO_IVEC (DBG_TRAP_NUM), (FUNCPTR) dbgBpStub);    }/********************************************************************************* _dbgInstSizeGet - set up breakpoint instruction** RETURNS: size of the instruction at specified location.** NOMANUAL*/int _dbgInstSizeGet    (    INSTR * pBrkInst		/* pointer to hold breakpoint instruction */    )    {    return ((2 * sizeof (INSTR)) / sizeof (INSTR));    }/********************************************************************************* _dbgRetAdrsGet - get return address for current routine** RETURNS: return address for current routine.** NOMANUAL*/INSTR * _dbgRetAdrsGet    (    REG_SET * pRegSet		/* pointer to register set */    )    {    int* sp = (int *) pRegSet->spReg;    if (INST_CMP (I7_CONTENTS (sp), INST_CALL, INST_CALL_MASK) || 	INST_CMP (I7_CONTENTS (sp), JMPL_o7, JMPL_o7_MASK))	{        return ((INSTR *) (I7_CONTENTS(sp) + 2));	}    else	return (NULL);    }/********************************************************************************* _dbgTraceDisable - disable trace mode** Since trace mode is not supported on SPARC, this routine does nothing.** NOMANUAL*/void _dbgTraceDisable (void)    {    }/********************************************************************************* _dbgTaskBPModeClear - clear breakpoint enable mode** NOMANUAL*/void _dbgTaskBPModeClear     (    int tid	/* task id */    )    {    /* THIS ROUTINE MUST BE USED IN PAIR WITH dbgTaskBPModeSet. */    oldIntLevel = intLock ();    }/********************************************************************************* _dbgSStepClear - clear single step mode** RETURNS: N/A** NOMANUAL*/void _dbgSStepClear (void)    {    }/********************************************************************************* _dbgSStepSet - set single step mode** RETURNS: N/A** NOMANUAL*/void _dbgSStepSet     (    BREAK_ESF * pInfo		/* pointer to info saved on stack */    )    {    int tid = taskIdSelf ();    _dbgStepAdd  (tid, BRK_TEMP, NULL, NULL);    }/******************************************************************************** _dbgTaskSStepSet - set single step mode of task** RETURNS: N/A** NOMANUAL*/void _dbgTaskSStepSet    (    int tid		/* task's id */    )    {    }/******************************************************************************** _dbgTaskBPModeSet - set breakpoint mode of task** RETURNS: N/A** NOMANUAL*/void _dbgTaskBPModeSet     (    int tid		/* task's id */    )    {    /* THIS ROUTINE MUST BE USED IN PAIR WITH dbgTaskBPModeClear. */    intUnlock (oldIntLevel);    }/********************************************************************************* _dbgFuncCallCheck - check next instruction** This routine checks to see if the next instruction is a JSR or BSR.* If it is, it returns TRUE, otherwise, returns FALSE.** RETURNS: TRUE if next instruction is JSR or BSR, or FALSE otherwise.** NOMANUAL*/BOOL _dbgFuncCallCheck    (    INSTR * addr		/* pointer to instruction */    )    {    return (INST_CMP (addr, INST_CALL, INST_CALL_MASK) || 	    INST_CMP (addr, JMPL_o7, JMPL_o7_MASK));    }/********************************************************************************* _dbgRegsAdjust - set register set** RETURNS: N/A** NOMANUAL*/void _dbgRegsAdjust    (    FAST int 	tid,		/* id of task that hit breakpoint */    TRACE_ESF *	pInfo,		/* pointer to esf info saved on stack */    int * 	pRegs,		/* pointer to buf containing saved regs */    BOOL 	stepBreakFlag	/* TRUE if this was a trace exception */				/* FALSE if this was a SO or CRET breakpoint */    )    {    REG_SET regSet;    int ix;    ESF * pESF = (ESF *) pRegs;    for (ix = 0; ix < 8; ++ix)	regSet.global [ix] = pESF->esf.global[ix];    for (ix =0; ix < 8; ++ix)	regSet.out [ix] = pESF->esf.out[ix];    for (ix =0; ix < 8; ++ix)	regSet.local [ix] = pESF->esf.local[ix];    for (ix =0; ix < 8; ++ix)	regSet.in [ix] = pESF->esf.in[ix];    regSet.pc  = pESF->esf.pc;    regSet.npc = pESF->esf.npc;    regSet.psr = pESF->esf.psr;    regSet.wim = pESF->esf.wim;    regSet.tbr = pESF->esf.tbr;    regSet.y   = pESF->esf.y;    taskRegsSet (tid, &regSet);    }/********************************************************************************* _dbgIntrInfoSave - restore register set** RETURNS: N/A** NOMANUAL*/void _dbgIntrInfoSave    (    BREAK_ESF *	pInfo		/* pointer to info saved on stack */    )    {    /* does nothing */    }/******************************************************************************** _dbgIntrInfoRestore - restore the info saved by dbgIntrInfoSave** NOMANUAL*/void _dbgIntrInfoRestore    (    TRACE_ESF *  pInfo		/* pointer to execption frame */    )    {    /* does nothing */    }/********************************************************************************* _dbgInfoPCGet - get pc from stack** RETURNS: value of pc saved on stack** NOMANUAL*/INSTR * _dbgInfoPCGet    (    BREAK_ESF * pInfo		/* pointer to info saved on stack */    )    {    return (pInfo->pc);    }/********************************************************************************* _dbgTaskPCSet - set task's pc** RETURNS: N/A** NOMANUAL*/void _dbgTaskPCSet    (    int     tid,		/* task id */    INSTR * pc,			/* task's pc */    INSTR * npc			/* task's npc */    )    {    REG_SET regSet;		/* task's register set */