taskRegsGet (tid, &regSet);    regSet.pc = pc;    if (npc == NULL)	regSet.npc = pc + 1;    else	regSet.npc = npc;    taskRegsSet (tid, &regSet);    }/********************************************************************************* _dbgTaskPCGet - get task's pc** RETURNS: N/A** NOMANUAL*/INSTR * _dbgTaskPCGet    (    int tid	/* task's id */    )    {    REG_SET	regSet;    taskRegsGet (tid, &regSet);    return ((INSTR *) regSet.pc);    }/********************************************************************************* _dbgStepAdd -  installs a break point of the given type at the next*		    executable address of the given task.** NOMANUAL*/STATUS _dbgStepAdd     (    int tid,				/* task id */    int breakType,			/* breakpoint type */    BREAK_ESF * pInfo,			/* pointer to info saved on stack */    int *  pRegSet			/* pointer to saved register set */    )    {    INSTR      machInstr;		/* Machine instruction */    INSTR *    npc;			/* next program counter */    char       branchCondition;		/* Branch condition */    REG_SET    regSet;			/* pointer to task registers */    REG_SET *  pRegs = &regSet;		/* pointer to task registers */    BRKENTRY * bp;    UINT       op2;    if (taskRegsGet (tid, pRegs) != OK)        {	return (ERROR);	}    npc	= pRegs->npc;             /* Default nPC */    if ((bp = dbgBrkGet (pRegs->pc, tid, FALSE)) != NULL)	machInstr = bp->code;    else    	machInstr = *(pRegs->pc);    /* Conditional branch instruction with annul bit set */    if (((machInstr & 0xe0000000) == A_1) &&	 (((op2 = (machInstr >> 22) & 0x7) == 2) || (op2 == 6) || (op2 == 7)))	{	/* bits:25-28 common to all branch types */	branchCondition   = ( machInstr >> 25 ) & 0xF; 	/* Switch on the type of branch (Bicc, CBccc, FBfcc).  No coprocessor 	 * is defined at this time (CBccc).  The location of status bits for 	 * coprocessors is implementation specific 	 */	switch (op2)	    {	    case (2): /* Bicc  - Integer Conditional Branch */		{		BOOL 	carryFlag;		BOOL	overflowFlag;		BOOL	zeroFlag;		BOOL	negativeFlag;		carryFlag    = ((pRegs -> psr) >> 20) & 1; /* Carry */		overflowFlag = ((pRegs -> psr) >> 21) & 1; /* oVerflow */		zeroFlag     = ((pRegs -> psr) >> 22) & 1; /* Zero */		negativeFlag = ((pRegs -> psr) >> 23) & 1; /* Negative */		switch (branchCondition)		    {		    case (0): /* Branch Never */			    ++npc;			break;		    case (1): /* Branch On equal */			if ( !zeroFlag )			    ++npc;			break;		    case (2): /* Branch On Less or Equal */			if ( !(zeroFlag | ( negativeFlag ^ overflowFlag )))			    ++npc;			break;		    case (3): /* Branch on less than */			if (!(negativeFlag ^ overflowFlag))			    ++npc;			break;		    case (4): /* Branch on less, or equal, unsigned */			if (!(carryFlag | zeroFlag))			    ++npc;			break;		    case (5): /* Branch on carry set (less than, unsigned) */			if (!carryFlag )			    ++npc;			break;		    case (6): /* Branch on negative */			if ( ! negativeFlag )			    ++npc;			break;		    case (7): /* Branch on oVerflow */			if ( ! overflowFlag )			    ++npc;			break;		    case (8): /* Branch Always */			if ((machInstr & DISP22_SIGN) == DISP22_SIGN)			    {			    /* Negative displacement - sign-extend, 			     * two's complement 			     */			    machInstr = ~DISP22 | (machInstr & DISP22);			    machInstr = ~machInstr + 1;			    npc = (INSTR *)((INSTR)pRegs->pc					    - (machInstr << DISP22_SHIFT_CT));			    }			else			    {			    /* Positive displacement */			    machInstr &= DISP22;			    npc = (INSTR *)((INSTR)pRegs->pc					    + (machInstr << DISP22_SHIFT_CT));			    }			break;		    case (9): /* Branch on Not Equal */			if ( zeroFlag )			    ++npc;			break;		    case (0xa): /* Branch on Greater */			if ( ( zeroFlag | ( negativeFlag ^ overflowFlag )))			    ++npc;			break;		    case (0xb): /* Branch on Greater or Equal */			if ( negativeFlag ^ overflowFlag )			    ++npc;			break;		    case (0xc): /* Branch on Greater, Unsigned */			if ( carryFlag | zeroFlag )			    ++npc;			break;		    case (0xd): /* Branch on Carry Clear */			if ( carryFlag )			    ++npc;			break;		    case (0xe): /* Branch on Positive */			if ( negativeFlag )			    ++npc;			break;		    case (0xf): /* Branch on oVerflow Clear*/			if ( overflowFlag )			    ++npc;			break;		    }		}		break;	    case (6): /* FBfcc - Floating-Point Conditional Branch */		{		BOOL	equalState = FALSE;		BOOL	lessState = FALSE;		BOOL	greaterState = FALSE;		BOOL	unorderedState = FALSE;		UINT	state  = (((struct fpContext *)				    ( taskTcb(tid) -> pFpContext ))				      -> fsr & 0xc00 ) >> 10;		switch (state)		    {		    case (0):			equalState = TRUE;			break;		    case (1):			lessState = TRUE;			break;		    case (2):			greaterState = TRUE;			break;		    case (3):			unorderedState = TRUE;			break;		    default:			printf ("Impossible state:%d\n", state);			return (ERROR);		    }		switch (branchCondition)		    {		    case (0): /* Branch Never */		        npc++;			break;		    case (1): /* Branch On Not equal */			if ( !( unorderedState | lessState | greaterState ))			    ++npc;			break;		    case (2): /* Branch On Less or Greater */			if ( ! ( lessState | greaterState ))			    ++npc;			break;		    case (3): /* Branch on Unordered or Less */			if ( ! ( unorderedState | lessState ))			    ++npc;			break;		    case (4): /* Branch on less */			if ( !lessState )			    ++npc;			break;		    case (5): /* Branch on Unordered or Greater */			if ( ! (unorderedState | greaterState ))			    ++npc;			break;		    case (6): /* Branch on Greater */			if ( !greaterState )			    ++npc;			break;		    case (7): /* Branch on Unordered */			if ( !unorderedState )			    ++npc;			break;		    case (8): /* Branch Always */			if ((machInstr & DISP22_SIGN) == DISP22_SIGN)			    {			    /* Negative displacement - sign-extend, 			     * two's complement 			     */			    machInstr = ~DISP22 | (machInstr & DISP22);			    machInstr = ~machInstr + 1;			    npc = (INSTR *)((INSTR)pRegs->pc					    - (machInstr << DISP22_SHIFT_CT));			    }			else			    {			    /* Positive displacement */			    machInstr &= DISP22;			    npc = (INSTR *)((INSTR)pRegs->pc					    + (machInstr << DISP22_SHIFT_CT));			    }			break;		    case (9): /* Branch Equal */			if ( !equalState )			    ++npc;			break;		    case (0xa): /* Branch on Unordered or Equal */			if ( !(unorderedState | equalState ))			    ++npc;			break;		    case (0xb): /* Branch on Greater or Equal */			if (!(greaterState | equalState))			    ++npc;			break;		    case (0xc): /* Branch on Unordered or Greater, or Equal */			if ( !( unorderedState | greaterState | equalState ))			    ++npc;			break;		    case (0xd): /* Branch on Less or Equal */			if ( !(lessState | equalState))			    ++npc;			break;		    case (0xe): /* Branch on Unordered or Less or Equal */			if ( !(unorderedState | lessState | equalState))			    ++npc;			break;		    case (0xf): /* Branch on Unordered */			if ( !(lessState | greaterState | equalState))			    ++npc;			break;		    }		}		break;	    case (7):  /* CBccc - Coprocessor Conditional Branch */		printf ("Coprocessor conditional branches not supported\n");	        return (ERROR);	        break;	    default:		printf ("Invalid conditional branch instruction\n");		return (ERROR);		break;	    }	}    if (dbgBrkAdd (npc, tid, 0, breakType) != OK)	{	printf ("error inserting breakpoint\n");	return (ERROR);	}    return (OK);    }/********************************************************************************* psrShow - display the meaning of a specified `psr' value, symbolically (SPARC)** This routine displays the meaning of all the fields in a specified `psr' value,* symbolically.** Extracted from psl.h:* .CS* Definition of bits in the Sun-4 PSR (Processor Status Register)*  ------------------------------------------------------------------------* | IMPL | VER |      ICC      | resvd | EC | EF | PIL | S | PS | ET | CWP |* |      |     | N | Z | V | C |       |    |    |     |   |    |    |     |* |------|-----|---|---|---|---|-------|----|----|-----|---|----|----|-----|*  31  28 27 24  23  22  21  20 19   14  13   12  11  8   7   6    5  4   0* .CE* For compatibility with future revisions, reserved bits are defined to be* initialized to zero and, if written, must be preserved.** EXAMPLE* .CS*      -> psrShow 0x00001FE7*     Implementation 0, mask version 0:*     Fujitsu MB86900 or LSI L64801, 7 windows*             no SWAP, FSQRT, CP, extended fp instructions*         Condition codes: . . . .*         Coprocessor enables: . EF*         Processor interrupt level: f*         Flags: S PS ET*         Current window pointer: 0x07*      ->* .CE** RETURNS: N/A** SEE ALSO: psr(),* .I "SPARC Architecture Manual"** NOMANUAL*/void psrShow     (    ULONG psrValue	/* psr value to show */    )    {    printf ("Implementation %x, mask version %x:\n",	    (psrValue & PSR_IMPL) >> 28,	    (psrValue & PSR_VER) >> 28);    switch ((psrValue & PSR_IMPL) >> 28)	{	case (0x0):	    if (((psrValue & PSR_VER) >> 24) == 0)		{		printf ("Fujitsu MB86900 or LSI L64801, 7 windows\n");		}	    else if (((psrValue & PSR_VER) >> 24) == 2)		{		printf ("Fujitsu MB86930, 8 windows\n");		}	    break;	case (0x1):	    printf ("Cypress CY7C601, 8 windows.\n");	    printf ("        no extended fp instructions\n");	    if (((psrValue & PSR_VER) >> 24) > 1)		printf ("        (or possibly a Cypress/Ross successor).\n");	    break;	case (0x2):	    printf ("BIT B5000, 7 windows\n");	    printf ("        no extended fp instructions\n");	    printf ("        'some new hardware traps'\n");	    if (((psrValue & PSR_VER) >> 24) > 0)		printf ("        (or possibly a BIT successor).\n");	    break;	case (0x9):	    if (((psrValue & PSR_VER) >> 24) == 0)		{		printf ("Fujitsu MB86903, 8 windows\n");		}	    break;	default:	    break;	}    printf ("    Condition codes: ");    if (psrValue & PSR_N)	printf ("N ");    else	printf (". ");    if (psrValue & PSR_Z)	printf ("Z ");    else	printf (". ");    if (psrValue & PSR_V)	printf ("V ");    else	printf (". ");    if (psrValue & PSR_C)	printf ("C\n");    else	printf (".\n");    printf ("    Coprocessor enables: ");    if (psrValue & PSR_EC)	printf ("EC ");    else	printf (". ");    if (psrValue & PSR_EF)	printf ("EF\n");    else	printf (".\n");    printf ("    Processor interrupt level: %x\n",	(psrValue & PSR_PIL) >> 8);    printf ("    Flags: ");    if (psrValue & PSR_S)	printf ("S ");    else	printf (". ");    if (psrValue & PSR_PS)	printf ("PS ");    else	printf (". ");    if (psrValue & PSR_ET)	printf ("ET\n");    else	printf (".\n");    printf ("    Current window pointer: 0x%02x\n",	psrValue & PSR_CWP);    }/********************************************************************************* fsrShow - display the meaning of a specified fsr value, symbolically (SPARC)** This routine displays the meaning of all the fields in a specified `fsr' value,* symbolically.** Extracted from reg.h:* .CS* Definition of bits in the Sun-4 FSR (Floating-point Status Register)*   -------------------------------------------------------------*  |  RD |  RP | TEM |  res | FTT | QNE | PR | FCC | AEXC | CEXC |*  |-----|---- |-----|------|-----|-----|----|-----|------|------|*   31 30 29 28 27 23 22  17 16 14   13   12  11 10 9    5 4    0* .CE* For compatibility with future revisions, reserved bits are defined to be* initialized to zero and, if written, must be preserved.** EXAMPLE* .CS*     -> fsrShow 0x12345678*     Rounding Direction: nearest or even if tie.*     Rounding Precision: single.*     Trap Enable Mask:*        underflow.*     Floating-point Trap Type: IEEE exception.*     Queue Not Empty: FALSE;*     Partial Remainder: TRUE;*     Condition Codes: less than.*     Accumulated exceptions:*        inexact divide-by-zero invalid.*     Current exceptions:*        overflow invalid* .CE** RETURNS: N/A** SEE ALSO:* .I "SPARC Architecture Manual"** NOMANUAL*/void fsrShow    (    UINT fsrValue	/* fsr value to show */    )    {    printf ("    Rounding Direction: ");    switch ((fsrValue & FSR_RD) >> FSR_RD_SHIFT)	{	case (RD_NEAR):	    printf ("nearest or even if tie.");	    break;	case (RD_ZER0):	    printf ("to zero.");	    break;	case (RD_POSINF):	    printf ("positive infinity.");	    break;	case (RD_NEGINF):	    printf ("negative infinity.");	    break;	}