?? dss_edmacisr.c
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/*
* Copyright 2002 by Texas Instruments Incorporated.
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* "@(#) DSP/BIOS 4.80.208 12-06-02 (barracuda-l19)" */
/*
* ======== dss_edmacisr.c ========
*/
#include <std.h>
#include <log.h>
#include <pip.h>
#define _EDMA_ 1
#include "dss.h"
#include "dss_priv.h"
/*
* ======== DSS_edmaIsr ========
*
* This ISR is called under 2 conditions. Either when EDMA has received a
* complete buffer of samples from Serial Port (Codec) or when a EDMA has
* completed transmission of a buffer to the Serial Port (Codec). This
* ISR must configure the next buffer to be filled by the EDMA in each
* case.
*/
Void DSS_edmaIsr(Void)
{
Int channel = EDMA_RGET(CIPR); /* get Channel Interrupt Pending bits */
DSS_computePhase(channel); /* compute I/O phase difference */
LOG_message("DSS_edmaIsr: 0x%x", channel);
if (channel & DSS_RXDONE) { /* Channel = McBSP Buffer Rx'ed */
PIP_put(&DSS_rxPipe);
DSS_rxCnt = 0; /* Reset Buffer Count for sync */
EDMA_RSET(CIPR, DSS_RXDONE); /* Reset EDMA Channel Flag */
DSS_rxPrime(TRUE);
}
if (channel & DSS_TXDONE) { /* Channel = McBSP Buffer Tx'ed */
PIP_free(&DSS_txPipe);
DSS_txCnt = 0; /* Reset Buffer Count for sync */
EDMA_RSET(CIPR, DSS_TXDONE); /* Reset EDMA Channel Flag */
DSS_txPrime(TRUE);
}
}
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