/*
 *  Copyright 2002 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DSP/BIOS 4.80.208 12-06-02 (barracuda-l19)" */
/*
 *  ======== dsscfg.h ========
 */
#ifndef DSSCFG_
#define DSSCFG_	1

#ifdef _EVM5510_

#define far
#define CHIP_5510 1
#include <csl_dma.h>
#include <csl_mcbsp.h>

extern  DMA_Handle hDma4;
extern  DMA_Handle hDma5;
extern  MCBSP_Handle hMcbsp2;
extern  DMA_Config dmaCfg4;
extern  DMA_Config dmaCfg5;
extern  MCBSP_Config mcbspCfg2;

#endif


#ifdef _EDMA_

#define CHIP_6211 1
#include <csl_edma.h>

/*
 *  ======== TCC Flags ========
 *  These flags must match the configured Transfer Completion Code (TCC)
 *  specified in the EDMA Configuration structures used to create the
 *  EDMA handles below.
 */
#define DSS_RXDONE	(1 << 0xd)	/* McBSP 0 receive event mask */
#define DSS_TXDONE	(1 << 0xc)	/* McBSP 0 transmit event mask */

/*
 *  ======== Interrupts ========
 *  These must match the interrupt binding in the DSS configuration
 *  of the DSS HW ISR.
 */
#define DSS_IERDMABIT	0x00000100	/* IER bitmask for DMA interrupt */
#define DSS_IERRX0BIT	0x00000800	/* bitmask McBSP 0 Rx interrupt */

extern far EDMA_Handle DSS_hEdmaRint0; 
extern far EDMA_Handle DSS_hEdmaXint0; 
#endif

#ifdef _DMA_

#define CHIP_6201 1
#include <csl_dma.h>

extern far DMA_Handle DSS_hDmaRint0; 
extern far DMA_Handle DSS_hDmaXint0; 
#endif

#ifdef _54_
#define CHIP_5402   1
#endif

#if (defined(_64_) && !(defined(_EDMA_) || defined(_DMA_)))
#define DSS_IERRX0BIT	0x00000800	/* bitmask McBSP 0 Rx interrupt */
#define CHIP_6416 1
#endif

#include <csl_mcbsp.h>
extern far MCBSP_Handle DSS_hMcbsp0;

#include <sts.h>
extern far STS_Obj DSS_ioPhase;

#ifndef DSS_RXDONE	/* if not otherwise defined, define "done" flags */
#define DSS_RXDONE	1
#define DSS_TXDONE	2
#endif

#endif