?? start.lst
字號:
280 #set PLLx2 3 ; set PLL to
x2 ext. clock/quartz
281 #set PLLx3 4 ; set PLL to
x3 ext. clock/quartz
282 #set PLLx4 5 ; set PLL to
x4 ext. clock/quartz
283
284 #set CLOCKSPEED PLLx4 ; <<< set PLL
ratio
285 #set CLOCKWAIT ON ; <<< wait fo
r stabilized PLL, if
286 ; PLL is
used
287 ; The clock is set quiet early. However, if CLOC
KWAIT is ON, polling
288 ; for machine clock to be switched to PLL is don
e at the end of this
289 ; file. Therefore, the stabilization time is not
wasted. Main() will
290 ; finally start at correct speed. Resources can
immediately be used.
291 ;
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F2MC-16 Family SOFTUNE Assembler V30L11 2007-03-02 13:17:36 Page: 10
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292 ; This startup file version does not support sub
clock.
293
294 ;===============================================
=====================
295 ; 4.8 External Bus Interface
296 ;===============================================
=====================
297
298 #set SINGLE_CHIP 0 ; all interna
l
299 #set INTROM_EXTBUS 1 ; mask ROM, F
LASH, or OTP ROM used
300 #set EXTROM_EXTBUS 2 ; full extern
al bus (INROM not used)
301
302 #set BUSMODE SINGLE_CHIP ; <<< set bus
mode (see mode pins)
303
304 #set ROMMIRROR ON ; <<< ROM mir
ror function ON/OFF
305 ; MB90500
/400 family only
306
307 ; In Internal ROM / External Bus mode one can se
lect whether to mirror
308 ; area FF4000..FFFFFF to 004000..00FFFF. This is
necessary to get the
309 ; compiler ROMCONST option working. However, if
ROMCONST is not used,
310 ; this area might be used to access external mem
ory. This is intended
311 ; to increase performance, if a lot of dynamic d
ata have to be accessed.
312 ; In SMALL and MEDIUM model these data can be ac
cessed within bank 0,
313 ; which allows to use near addressing.
314 ; These controller without the ROMM-control regi
ster always have the
315 ; mirror function on in INROM mode.
316
317 ; If BUSMODE is "SINGLE_CHIP", ignore remaining
bus settings.
318
319 #set AUTOWAIT_IO 0 ; <<< 0..3 wa
itstates for IO area
320 #set AUTOWAIT_LO 0 ; <<< 0..3 fo
r lower external area
321 #set AUTOWAIT_HI 0 ; <<< 0..3 fo
r higher external area
322
323 #set ADDR_PINS B'00000000 ; <<< select
used address lines
324 ; A23..A1
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F2MC-16 Family SOFTUNE Assembler V30L11 2007-03-02 13:17:36 Page: 11
STARTUP FILE FOR MEMORY INITIALISATION
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6 to be output.
325 ; This is the value to be set in HACR-register.
"1" means: pin used as
326 ; IO-port. (B'10000000 => A23 not used, B'000000
01 => A16 not used)
327
328 #set BUS_SIGNAL B'00000100 ; <<< enable
bus control signals
329 ; |||||||+-- ignored
330 ; ||||||+--- bus width lowe
r memory (0:16, 1:8Bit)
331 ; |||||+---- output WR sign
al(s) (1: enabled )
332 ; ||||+----- bus width uppe
r memory (0:16, 1:8Bit)
333 ; |||+------ bus width ext
IO area (0:16, 1:8Bit)
334 ; ||+------- enable HRQ inp
ut (1: enabled )
335 ; |+-------- enable RDY inp
ut (1: enabled )
336 ; +--------- output CLK sig
nal (1:enabled )
337
338 ; These settings correspond to the EPCR-register
.
339 ; Hint: Except for MB90500/400 devices the clock
output is needed for
340 ; external RDY synchronisation, if Ready functio
n is used.
341 ; Hint: Don't forget to enable WR signals, if ex
ternal RAM has to be
342 ; written to.
343
344 #set iARSR ((AUTOWAIT_IO<<6)|((AUTOWAIT
_HI&3)<<4)|(AUTOWAIT_LO&3))
345
346 ;===============================================
=====================
347 ; 4.9 Reset Vector
348 ;===============================================
=====================
349
350 #set RESET_VECTOR ON ; <<< enable
reset vector
351
352 #if BUSMODE == SINGLE_CHIP
353 # set MODEBYTE 0
354 #else
355 X # set MODEBYTE ( ((BUSMODE&3)<<6) | ((
~BUS_SIGNAL)&8) )
356 #endif
357
358 ; Above setting can also be used, if all other i
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F2MC-16 Family SOFTUNE Assembler V30L11 2007-03-02 13:17:36 Page: 12
STARTUP FILE FOR MEMORY INITIALISATION
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nterrupt vectors are
359 ; specified via "pragma intvect". Only if interr
upts 0..7 are specified
360 ; via "pragma intvect", this will conflict with
the vector in this
361 ; module. The reason is the INTVECT section, whi
ch includes the whole
362 ; area from the lowest to the highest specified
vector.
363
364 #if RESET_VECTOR == ON
RE FFFFDC ----------<RESVECT>---------- 365 .SECTION RESVECT, CONST, LOCATE
=H'FFFFDC
RE FFFFDC 000000R 366 .DATA.E _start
RE FFFFDF 00 367 .DATA.B MODEBYTE
368 #endif
369
370 ;===============================================
=====================
371 ; 4.10 Enable RAMCODE Copying
372 ;===============================================
=====================
373
374 #set COPY_RAMCODE OFF ; <<< enabl
e RAMCODE section to
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