phy_write(16, 0x5);	/* DM9801 E4 */     else       phy_write(16, 0x1005); /* DM9801 E3 and others */     phy_write(25, ((phy_read(24) + 3) & 0xff) | 0xf000);   } else {     /* DM9802 present */     phy_write(16, 0x5);     phy_write(25, (phy_read(25) & 0xff00) + 2);   } }}/*  Sense media mode and set CR6*/static void davicom_media_chk(struct nic * nic){  unsigned long to, csr6;  csr6 = 0x00200000;	/* SF */  outl(csr6, ioaddr + CSR6);  if (vendor == PCI_VENDOR_ID_DAVICOM && dev_id == PCI_DEVICE_ID_DM9009) {    /* Set to 10BaseT mode for DM9009 */    phy_write(0, 0);  } else {    /* For DM9102/DM9102A */    to = currticks() + 2 * TICKS_PER_SEC;    while ( ((phy_read(1) & 0x24)!=0x24) && (currticks() < to))      /* wait */ ;    if ( (phy_read(1) & 0x24) == 0x24 ) {      if (phy_read(17) & 0xa000)          csr6 |= 0x00000200;	/* Full Duplex mode */    } else      csr6 |= 0x00040000; /* Select DM9801/DM9802 when Ethernet link failed */  }  /* set the chip's operating mode */  outl(csr6, ioaddr + CSR6);  /* DM9801/DM9802 present check & program */  if (csr6 & 0x40000)    HPNA_process();}/*********************************************************************//* EEPROM Reading Code                                               *//*********************************************************************//* EEPROM routines adapted from the Linux Tulip Code *//* Reading a serial EEPROM is a "bit" grungy, but we work our way   through:->.*/static int read_eeprom(unsigned long ioaddr, int location, int addr_len){  int i;  unsigned short retval = 0;  long ee_addr = ioaddr + CSR9;  int read_cmd = location | EE_READ_CMD;  whereami("read_eeprom\n");  outl(EE_ENB & ~EE_CS, ee_addr);  outl(EE_ENB, ee_addr);  /* Shift the read command bits out. */  for (i = 4 + addr_len; i >= 0; i--) {    short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;    outl(EE_ENB | dataval, ee_addr);    eeprom_delay();    outl(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);    eeprom_delay();  }  outl(EE_ENB, ee_addr);  for (i = 16; i > 0; i--) {    outl(EE_ENB | EE_SHIFT_CLK, ee_addr);    eeprom_delay();    retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0);    outl(EE_ENB, ee_addr);    eeprom_delay();  }  /* Terminate the EEPROM access. */  outl(EE_ENB & ~EE_CS, ee_addr);  return retval;}/*********************************************************************//* davicom_init_chain - setup the tx and rx descriptors                *//* Sten 10/9							     *//*********************************************************************/static void davicom_init_chain(struct nic *nic){  int i;  /* setup the transmit descriptor */  /* Sten: Set 2 TX descriptor but use one TX buffer because	   it transmit a packet and wait complete every time. */  for (i=0; i<NTXD; i++) {    txd[i].buf1addr = &txb[0];		/* Used same TX buffer */    txd[i].buf2addr = (unsigned char *)&txd[i+1]; /*  Point to Next TX desc */    txd[i].buf1sz   = 0;    txd[i].buf2sz   = 0;    txd[i].control  = 0x184;           /* Begin/End/Chain */    txd[i].status   = 0x00000000;      /* give ownership to Host */  }  /* construct perfect filter frame with mac address as first match     and broadcast address for all others */  for (i=0; i<192; i++) txb[i] = 0xFF;  txb[0] = nic->node_addr[0];  txb[1] = nic->node_addr[1];  txb[4] = nic->node_addr[2];  txb[5] = nic->node_addr[3];  txb[8] = nic->node_addr[4];  txb[9] = nic->node_addr[5];  /* setup receive descriptor */  for (i=0; i<NRXD; i++) {    rxd[i].buf1addr = &rxb[i * BUFLEN];    rxd[i].buf2addr = (unsigned char *)&rxd[i+1]; /* Point to Next RX desc */    rxd[i].buf1sz   = BUFLEN;    rxd[i].buf2sz   = 0;        /* not used */    rxd[i].control  = 0x4;		/* Chain Structure */    rxd[i].status   = 0x80000000;   /* give ownership to device */  }  /* Chain the last descriptor to first */  txd[NTXD - 1].buf2addr = (unsigned char *)&txd[0];  rxd[NRXD - 1].buf2addr = (unsigned char *)&rxd[0];  TxPtr = 0;  rxd_tail = 0;}/*********************************************************************//* davicom_reset - Reset adapter                                         *//*********************************************************************/static void davicom_reset(struct nic *nic){  unsigned long to;  u32 addr_low, addr_high;  whereami("davicom_reset\n");  /* Stop Tx and RX */  outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);  /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */  outl(0x00000001, ioaddr + CSR0);  davicom_wait(TICKS_PER_SEC);  /* TX/RX descriptor burst */  outl(0x0C00000, ioaddr + CSR0);	/* Sten 10/9 */  /* set up transmit and receive descriptors */  davicom_init_chain(nic);	/* Sten 10/9 */  /* Point to receive descriptor */  outl((unsigned long)&rxd[0], ioaddr + CSR3);  outl((unsigned long)&txd[0], ioaddr + CSR4);	/* Sten 10/9 */  /* According phyxcer media mode to set CR6,     DM9102/A phyxcer can auto-detect media mode */  davicom_media_chk(nic);  /* Prepare Setup Frame Sten 10/9 */  txd[TxPtr].buf1sz = 192;  txd[TxPtr].control = 0x024;		/* SF/CE */  txd[TxPtr].status = 0x80000000;	/* Give ownership to device */  /* Start Tx */  outl(inl(ioaddr + CSR6) | 0x00002000, ioaddr + CSR6);  /* immediate transmit demand */  outl(0, ioaddr + CSR1);  to = currticks() + TX_TIME_OUT;  while ((txd[TxPtr].status & 0x80000000) && (currticks() < to)) /* Sten 10/9 */    /* wait */ ;  if (currticks() >= to) {    printf ("TX Setup Timeout!\n");  }  /* Point to next TX descriptor */ TxPtr = (++TxPtr >= NTXD) ? 0:TxPtr;	/* Sten 10/9 */#ifdef DAVICOM_DEBUG  printf("txd.status = %X\n", txd.status);  printf("ticks = %d\n", currticks() - (to - TX_TIME_OUT));  davicom_more();#endif  /* enable RX */  outl(inl(ioaddr + CSR6) | 0x00000002, ioaddr + CSR6);  /* immediate poll demand */  outl(0, ioaddr + CSR2);}/*********************************************************************//* eth_transmit - Transmit a frame                                   *//*********************************************************************/static void davicom_transmit(struct nic *nic, const char *d, unsigned int t,                           unsigned int s, const char *p){  unsigned long to;  whereami("davicom_transmit\n");  /* Stop Tx */  /* outl(inl(ioaddr + CSR6) & ~0x00002000, ioaddr + CSR6); */  /* setup ethernet header */  memcpy(&txb[0], d, ETH_ALEN);	/* DA 6byte */  memcpy(&txb[ETH_ALEN], nic->node_addr, ETH_ALEN); /* SA 6byte*/  txb[ETH_ALEN*2] = (t >> 8) & 0xFF; /* Frame type: 2byte */  txb[ETH_ALEN*2+1] = t & 0xFF;  memcpy(&txb[ETH_HLEN], p, s); /* Frame data */  /* setup the transmit descriptor */  txd[TxPtr].buf1sz   = ETH_HLEN+s;  txd[TxPtr].control  = 0x00000184;      /* LS+FS+CE */  txd[TxPtr].status   = 0x80000000;      /* give ownership to device */  /* immediate transmit demand */  outl(0, ioaddr + CSR1);  to = currticks() + TX_TIME_OUT;  while ((txd[TxPtr].status & 0x80000000) && (currticks() < to))    /* wait */ ;  if (currticks() >= to) {    printf ("TX Timeout!\n");  }   /* Point to next TX descriptor */  TxPtr = (++TxPtr >= NTXD) ? 0:TxPtr;	/* Sten 10/9 */}/*********************************************************************//* eth_poll - Wait for a frame                                       *//*********************************************************************/static int davicom_poll(struct nic *nic){  whereami("davicom_poll\n");  if (rxd[rxd_tail].status & 0x80000000)    return 0;  whereami("davicom_poll got one\n");  nic->packetlen = (rxd[rxd_tail].status & 0x3FFF0000) >> 16;  if( rxd[rxd_tail].status & 0x00008000){      rxd[rxd_tail].status = 0x80000000;      rxd_tail++;      if (rxd_tail == NRXD) rxd_tail = 0;      return 0;  }  /* copy packet to working buffer */  /* XXX - this copy could be avoided with a little more work     but for now we are content with it because the optimised     memcpy is quite fast */  memcpy(nic->packet, rxb + rxd_tail * BUFLEN, nic->packetlen);  /* return the descriptor and buffer to receive ring */  rxd[rxd_tail].status = 0x80000000;  rxd_tail++;  if (rxd_tail == NRXD) rxd_tail = 0;  return 1;}/*********************************************************************//* eth_disable - Disable the interface                               *//*********************************************************************/static void davicom_disable(struct nic *nic){  whereami("davicom_disable\n");  /* disable interrupts */  outl(0x00000000, ioaddr + CSR7);  /* Stop the chip's Tx and Rx processes. */  outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);  /* Clear the missed-packet counter. */  (volatile unsigned long)inl(ioaddr + CSR8);}/*********************************************************************//* eth_probe - Look for an adapter                                   *//*********************************************************************/struct nic *davicom_probe(struct nic *nic, unsigned short *io_addrs,                          struct pci_device *pci){  unsigned int i;  u32 l1, l2;  whereami("davicom_probe\n");  if (io_addrs == 0 || *io_addrs == 0)    return 0;  vendor  = pci->vendor;  dev_id  = pci->dev_id;  ioaddr  = *io_addrs;  /* wakeup chip */  pcibios_write_config_dword(pci->bus, pci->devfn, 0x40, 0x00000000);  /* Stop the chip's Tx and Rx processes. */  outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6);  /* Clear the missed-packet counter. */  (volatile unsigned long)inl(ioaddr + CSR8);  /* Get MAC Address */  /* read EEPROM data */  for (i = 0; i < sizeof(ee_data)/2; i++)    ((unsigned short *)ee_data)[i] =        le16_to_cpu(read_eeprom(ioaddr, i, EEPROM_ADDRLEN));  /* extract MAC address from EEPROM buffer */  for (i=0; i<ETH_ALEN; i++)    nic->node_addr[i] = ee_data[20+i];  printf("Davicom %! at ioaddr %#hX\n", nic->node_addr, ioaddr);  /* initialize device */  davicom_reset(nic);  nic->reset    = davicom_reset;  nic->poll     = davicom_poll;  nic->transmit = davicom_transmit;  nic->disable  = davicom_disable;  return nic;}