/***************************************************************************             rf_test.c  -  Testing functions                            -------------------    begin                :  2002    authors              :  Linus Gasser    emails               :  linus.gasser@epfl.ch ***************************************************************************//***************************************************************************                                 Changes                                 ------- date - name - description 02-10-01 - ineiti - create 02-12-11 - ineiti - changed the name from daq_test.c  **************************************************************************//*************************************************************************** *                                                                         * *   This program is free software; you can redistribute it and/or modify  * *   it under the terms of the GNU General Public License as published by  * *   the Free Software Foundation; either version 2 of the License, or     * *   (at your option) any later version.                                   * *                                                                         * ***************************************************************************//** * This is the testing-part of the rf. All functions may be called * using ioctls */#define DBG_LVL 2#include "system.h"#include "debugging.h"#include "channel_rf.h"#include "rf_io.h"#include "memory.h"/* ----------------------------------------------------------------- *//* Random generators */#define FACTOR       16807#define LASTXN       127773#define UPTOMOD     -2836/* Uniform [0,1] */static int seed=428347;int Uniform (void) {  static int times, rest, prod1, prod2;  times    = seed / LASTXN;  rest     = seed - times * LASTXN;  prod1    = times * UPTOMOD;  prod2    = rest * FACTOR;  seed     = prod1 + prod2;  return seed;}int test_FPGA_mem( device_t *dev_rf ) {  int i,n;  unsigned int j,k;  unsigned int baseptr = dev_rf->data_base;  PR_DBG( 2, "In test_FPGA_mem()\n");  for (i=4;i<(ADC_LOCAL_SIZE>>2);i++) {    for (j=1<<31,n=0;n<32;j>>=1,n++) {      rf_writel(j,baseptr+ADC_BUFFER + i);      k = rf_readl(baseptr+ADC_BUFFER + i);      if (j!=k) {        PR_DBG( 0, "Failure at ADC address %x\n",i);        return(TEST_FAILURE_ADC_MEM);      }    }  }  PR_DBG( 2, "ADC Mem ok\n");  for (i=0;i<DAC_LOCAL_SIZE>>2;i++) {    for (j=1<<31,n=0;n<32;j>>=1,n++) {      rf_writel(j,baseptr+DAC_BUFFER + i);      k = rf_readl(baseptr+DAC_BUFFER + i);      if (j!=k)        return(TEST_FAILURE_DAC_MEM);    }  }  PR_DBG( 2, "DAC Mem ok\n");  return 0;}#define TEST_LENGTH_BLOCKS 200#define TEST_LENGTH_BYTES (TEST_LENGTH_BLOCKS*DAQ_DMA_BLOCK_SIZE_BYTES)int test_adc_dma( device_t *dev_rf, unsigned int time ) {  unsigned int baseptr = dev_rf->data_base;  dev_rf->tx_buffer = swr_malloc( TEST_LENGTH_BYTES );  dev_rf->rx_buffer = swr_malloc( TEST_LENGTH_BYTES );  dev_rf->blocks_in_frame = TEST_LENGTH_BLOCKS;  dev_rf->mboxes[0] = 0;  dev_rf->mboxes[1] = 0;  PR_DBG( 2, "In test_adc_dma(), ADC MBOX = %d\n",dev_rf->mboxes[0]);  setup_regs( dev_rf );  rf_writel(DMA_ADC_ON + CNT_ADC_ON, baseptr+PCI_START_STOP_DMA);  rtl_delay(694000*time);  // stop DMA engine  rf_writel(0x00000000,baseptr + PCI_START_STOP_DMA);  PR_DBG( 3, "mboxes[0] = %d,mboxes[1] = %d\n",dev_rf->mboxes[0],dev_rf->mboxes[1]);  swr_free( dev_rf->rx_buffer );  swr_free( dev_rf->tx_buffer );  if (dev_rf->mboxes[0] >= 1) {    return(0);  } else {    PR_DBG( 0, "test = %d\n",TEST_FAILURE_ADC_DMA);    return(TEST_FAILURE_ADC_DMA);  }}int test_dac_dma( device_t *dev_rf, unsigned int time ) {  unsigned int baseptr = dev_rf->data_base;  dev_rf->tx_buffer = swr_malloc( TEST_LENGTH_BYTES );  dev_rf->rx_buffer = swr_malloc( TEST_LENGTH_BYTES );  dev_rf->blocks_in_frame = TEST_LENGTH_BLOCKS;  dev_rf->mboxes[0] = 0;  dev_rf->mboxes[1] = 0;  PR_DBG( 2, "In test_dac_dma(), DAC MBOX = %d, time = %d\n",dev_rf->mboxes[1],time);  setup_regs( dev_rf );  rf_writel((DMA_DAC_ON + CNT_DAC_ON),            baseptr+PCI_START_STOP_DMA);  rtl_delay(694000*time);  // stop DMA engine  rf_writel(0x00000000,baseptr + PCI_START_STOP_DMA);  PR_DBG( 3, "mboxes[0] = %d, mboxes[1] = %d\n",dev_rf->mboxes[0],dev_rf->mboxes[1]);  swr_free( dev_rf->rx_buffer );  swr_free( dev_rf->tx_buffer );  if (dev_rf->mboxes[1] > 0)    return(0);  else {    PR_DBG( 0, "test = %d\n",TEST_FAILURE_DAC_DMA);    return(TEST_FAILURE_DAC_DMA);  }}int start_test_dac( device_t *dev_rf ) {  unsigned int baseptr = dev_rf->data_base;  rf_writel((DMA_DAC_ON + CNT_DAC_ON),            baseptr+PCI_START_STOP_DMA);  return 0;}int stop_test_dac( device_t *dev_rf ) {  unsigned int baseptr = dev_rf->data_base;  PR_DBG( 2, "In stop_test_dac(),mbox = %d\n",dev_rf->mboxes[1]);  rf_writel(0x00000000,baseptr + PCI_START_STOP_DMA);  return 0;}